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參數(shù)資料
| 型號(hào)： | SI5321-H-GL |
| 廠商： | Silicon Laboratories Inc |
| 文件頁數(shù)： | 1/34頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC CLOCK MULT SONET/SDH 63LFBGA |
| 標(biāo)準(zhǔn)包裝： | 260 |
| 系列： | DSPLL® |
| 類型： | 時(shí)鐘乘法器 |
| PLL： | 是 |
| 輸入： | LVTTL |
| 輸出： | CML |
| 電路數(shù)： | 1 |
| 比率 - 輸入:輸出： | 1:1 |
| 差分 - 輸入:輸出： | 是/是 |
| 頻率 - 最大： | 2.8GHz |
| 除法器/乘法器： | 是/是 |
| 電源電壓： | 3.135 V ~ 3.465 V |
| 工作溫度： | -20°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 63-LBGA |
| 供應(yīng)商設(shè)備封裝： | 63-PBGA（9x9） |
| 包裝： | 托盤 |
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Rev. 2.5 8/08
Copyright 2008 by Silicon Laboratories
Si5321
SONET/SDH PRECISION CLOCK MULTIPLIER IC
Features
Applications
Description
The Si5321 is a precision clock multiplier that exceeds the requirements of high-speed
communication systems, including OC-192/OC-48 and 10 Gigabit Ethernet. This device
phase locks to an input clock in the 19, 39, 78, 155, 311 or 622 MHz frequency range
and generates a frequency-multiplied clock output that can be configured for operation
in the 19, 39, 78, 155, 622, 1244, or 2488 MHz frequency range. Silicon Laboratories
DSPLL technology provides PLL functionality with unparalleled performance. It
eliminates external loop filter components, provides programmable loop parameters,
and simplifies design. FEC rates are supported by selectable forward and reverse 255/
238 (15/14), 255/237 (85/79), and 66/64 (33/32) conversion factors. The ITU-T G.709
255/237 rate and the IEEE 802.3ae 66/64 rate are supported when using a 155 MHz or
higher rate input clock. The performance and integration of Silicon Laboratories’ Si5321
clock IC provides high-level support of the latest specifications and systems. It operates
from a single 3.3 V supply.
Functional Block Diagram
Ultra-low jitter clock output with jitter
generation as low as 0.3 psRMS
No external components (other than a
resistor and bypassing)
Input clock ranges at 19, 39, 78, 155,
311, or 622 MHz
Output clock ranges at 19, 39, 78, 155,
311, 622, 1244, or 2488 MHz
Maximum range includes 693 MHz for
10 GbE FEC support
Digital hold for loss-of-input clock
Support for 255/238 (15/14),
255/237 (85/79), and 66/64 FEC scaling
(ITU-T G.709 and IEEE 802.3ae)
Selectable loop bandwidth
Loss-of-signal alarm output
Low power
Small size (9 x 9 mm)
Backwards compatible with Si5320
SONET/SDH line/port cards
Terabit routers
Core switches
Digital cross connects
INFRQSEL[2:0]
FRQSEL[2:0]
CLKOUT+
CLKOUT–
2
CAL_ACTV
2
FEC[2:0]
BWSEL[1:0]
3
2
Biasing & Supply Regulation
REXT
VSEL33
VDD
GND
÷
DH_ACTV
÷
Signal
Detect
Calibration
RSTN/CAL
2
CLKIN+
CLKIN–
VALTIME
LOS
FXDDELAY
BWBOOST
DSPLL
Ordering Information:
See page 30.
Si5321
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| SI5321-H-ZL2 | 制造商:Silicon Laboratories Inc 功能描述: |
| Si5321-XLNX-DC | 功能描述:子卡和OEM板 Silabs/Xilinx Ref Design RoHS:否 制造商:BeagleBoard by CircuitCo 產(chǎn)品:BeagleBone LCD4 Boards 用于:BeagleBone - BB-Bone - Open Source Development Kit |
| SI5322 | 制造商:SILABS 制造商全稱:SILABS 功能描述:Pin-Controlled 1_710 MHz Jitter Cleaning Clock |
| Si5322/23-EVB | 功能描述:時(shí)鐘和定時(shí)器開發(fā)工具 Si5322/Si5323 EVAL BOARD RoHS:否 制造商:Texas Instruments 產(chǎn)品:Evaluation Modules 類型:Clock Conditioners 工具用于評(píng)估:LMK04100B 頻率:122.8 MHz 工作電源電壓:3.3 V |
| Si5322-B-GM | 功能描述:時(shí)鐘合成器/抖動(dòng)清除器 PIN-PROGRAMMABLE CLK MULTIPLIER 1 OUT RoHS:否 制造商:Skyworks Solutions, Inc. 輸出端數(shù)量: 輸出電平: 最大輸出頻率: 輸入電平: 最大輸入頻率:6.1 GHz 電源電壓-最大:3.3 V 電源電壓-最小:2.7 V 封裝 / 箱體:TSSOP-28 封裝:Reel |
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