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參數(shù)資料
| 型號： | SI5338L-A-GM |
| 廠商： | Silicon Laboratories Inc |
| 文件頁數(shù)： | 22/44頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC CLK GEN I2C BUS PROG 24QFN |
| 標(biāo)準(zhǔn)包裝： | 490 |
| 系列： | MultiSynth™ |
| 類型： | * |
| PLL： | 是 |
| 輸入： | CML，HCSL，HSCL，LVDS，LVPECL，晶體 |
| 輸出： | CMOS，HCSL. HSTL. LVDS. LVPECL. SSTL |
| 電路數(shù)： | 1 |
| 比率 - 輸入:輸出： | 1:4 |
| 差分 - 輸入:輸出： | 是/是 |
| 頻率 - 最大： | 350MHz |
| 除法器/乘法器： | 是/是 |
| 電源電壓： | 1.71 V ~ 3.63 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 24-VFQFN 裸露焊盤 |
| 供應(yīng)商設(shè)備封裝： | 24-QFN（4x4） |
| 包裝： | 托盤 |
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Si5338
Rev. 1.3
29
4.2. Synchronous Frequency Translation
In other cases, it is useful to generate an output
frequency that is synchronous (or phase-locked) to
another clock frequency. The Si5338 is the ideal choice
for
generating
up
to
four
clocks
with
different
frequencies with a fixed phase relationship to an input
reference. Because of its highly precise frequency
synthesis, the Si5338 can generate all four output
frequencies with 0 ppm error to the input reference. The
Si5338 is an ideal choice for applications that have
traditionally required multiple stages of frequency
synthesis to achieve complex frequency translations.
Examples are in broadcast video (e.g., 148.5 MHz to
148.351648351648 MHz), WAN/LAN applications (e.g.
155.52 MHz
to
156.25 MHz),
and
Forward
Error
Correction (FEC) applications (e.g., 156.25 MHz to
161.1328125 MHz). Using the input reference selectors,
the Si5338 can select from one of four inputs (IN1/IN2,
IN3, IN4, and IN5/IN6). Figure 18 shows the Si5338
configured
as
a
synchronous
clock
generator.
Frequencies and multiplication ratios may be entered
into ClockBuilder Desktop using fractional notation to
ensure that the exact scaling ratios can be achieved.
Figure 18. Si5338 as a Synchronous Clock
Generator or Frequency Translator
4.3. Configurable Buffer and Level Transla-
tor
Using the output selectors, the synthesis stage can be
entirely bypassed allowing the Si5338 to act as a
configurable clock buffer/divider with level translation
and selectable inputs. Because of its highly selectable
configuration, virtually any combination is possible. The
configurable
output
drivers
allow
four
differential
outputs, eight single-ended outputs, or a combination of
both. Figure 19 shows the Si5338 configured as a
flexible clock buffer.
Figure 19. Si5338 as a Configurable Clock
Buffer/Divider with Level Translation
4.3.1. Combination Free-Running and Synchronous
Clock Generator
Another application of the Si5338 is in generating both
free-running and synchronous clocks in one device.
This is accomplished by configuring the input and
output selectors for the desired split configuration. An
example of such an application is shown in Figure 20.
Figure 20. Si5338 In a Free-Running and
Synchronous Clock Generator Application
MS0
R0
Si5338
F0
F1
F2
F3
MS1
R1
MS2
MS3
R2
R3
P1
P2
PLL
ref
Fin
R0
S i53 38
R1
R2
R3
F in
F in *
1
R0
F in *
1
R1
F in *
1
R2
F in *
1
R3
R0
F0
F1
F2
F3
R1
MS2
MS3
R2
R3
P2
Si5338
Osc
XTAL
PLL
ref
Fin
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| SI5338L-A-GMR | 功能描述:時鐘發(fā)生器及支持產(chǎn)品 I2C-Program Clk Gen 0.16-350MHz Pin-Ctrl RoHS:否 制造商:Silicon Labs 類型:Clock Generators 最大輸入頻率:14.318 MHz 最大輸出頻率:166 MHz 輸出端數(shù)量:16 占空比 - 最大:55 % 工作電源電壓:3.3 V 工作電源電流:1 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-56 |
| SI5338L-B00400-GM | 制造商:Silicon Laboratories Inc 功能描述:CLOCK - Bulk |
| SI5338L-B00400-GMR | 制造商:Silicon Laboratories Inc 功能描述:CLOCK - Tape and Reel |
| SI5338L-B02376-GM | 制造商:Silicon Laboratories Inc 功能描述:CLOCK - Rail/Tube |
| Si5338L-B-GM | 功能描述:時鐘發(fā)生器及支持產(chǎn)品 I2C-PRGRMBL clock generatr 0.16-350MHz RoHS:否 制造商:Silicon Labs 類型:Clock Generators 最大輸入頻率:14.318 MHz 最大輸出頻率:166 MHz 輸出端數(shù)量:16 占空比 - 最大:55 % 工作電源電壓:3.3 V 工作電源電流:1 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-56 |
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