Si5369
20
Rev. 1.0
Figure 7. Si5369 Typical Application Circuit (I2C Control Mode)
Figure 8. Si5369 Typical Application Circuit (SPI Control Mode)
Si5369
CKIN1+
CKIN1–
INT_ALM
CnB
LOL
RST
CKOUT1+
CKOUT1–
VDD
GN
D
Ferrite
Bead
System
Power
Supply
C10
C1–9
Input
Clock
Sources*
Reset
Interrupt/Alarm Output
Indicator
CKINn Invalid Indicator
(n = 1 to 3)
PLL Loss of Lock
Indicator
Clock
Outputs
CMODE
Control Mode (L)
CKOUT4+
CKOUT4–
FS_OUT+
FS_OUT–
CKIN4+
CKIN4–
Assumes differential LVPECL termination (3.3 V) on clock inputs.
*Note:
Serial Data
Serial Clock
SDA
SCL
I2C
Interface
Serial Port
Address
A[2:0]
0.1 F
1 F
0.1 F
100
0.1 F
+
–
0.1 F
100
0.1 F
+
–
0.1 F
100
0.1 F
+
–
130
130
82
82
VDD = 3.3 V
130
130
82
82
VDD = 3.3 V
XA
XB
Crystal
XA
XB
Ext. Refclk
0.1 F
Option 1:
Option 2:
0.1 F
RATE[1:0]
Rate
INC
DEC
Si5369
CKIN1+
CKIN1–
INT_ALM
CnB
LOL
RST
CKOUT1+
CKOUT1–
Input
Clock
Sources*
Reset
Interrupt/Alarm Output
Indicator
CKINn Invalid Indicator
(n = 1 to 3)
PLL Loss of Lock
Indicator
Clock
Outputs
CMODE
Control Mode (H)
CKOUT4+
CKOUT4–
FS_OUT+
FS_OUT–
CKIN4+
CKIN4–
130
130
82
82
VDD = 3.3 V
130
130
82
82
VDD = 3.3 V
SPI
Interface
Serial Data
Out
Serial Data
In
SDO
SDI
Serial Clock
SCL
Slave Select
SS
VD
D
GND
Ferrite
Bead
System
Power
Supply
C10
C1–9
0.1 F
1 F
Assumes differential LVPECL termination (3.3 V) on clock inputs.
*Note:
0.1 F
100
0.1 F
+
–
0.1 F
100
0.1 F
+
–
0.1 F
100
0.1 F
+
–
XA
XB
Crystal
XA
XB
Ext. Refclk
0.1 F
Option 1:
Option 2:
0.1 F
RATE[1:0]
Rate
INC
DEC