參數(shù)資料
型號(hào)： SI824XCLASSD-KIT
廠商： Silicon Laboratories Inc
文件頁數(shù)： 13/30頁
文件大小： 0K
描述： BOARD EVAL FOR SI824X
標(biāo)準(zhǔn)包裝： 1
放大器類型： D 類
輸出類型： 2 通道（立體聲）
在某負(fù)載時(shí)最大輸出功率 x 通道數(shù)量： 120W x 2 @ 8 歐姆
板類型： 完全填充
已用 IC / 零件： Si824x
已供物品： 板
其它名稱： 336-2002
Si824x
20
Rev. 1.0
3.6. Layout Considerations
It is most important to minimize ringing in the drive path and noise on the Si824x VDD lines. Care must be taken to
minimize parasitic inductance in these paths by locating the Si824x as close to the device it is driving as possible.
In addition, the VDD supply and ground trace paths must be kept short. For this reason, the use of power and
ground planes is highly recommended. A split ground plane system having separate ground and VDD planes for
power devices and small signal components provides the best overall noise performance.
3.7. Undervoltage Lockout Operation
Device behavior during start-up, normal operation and shutdown is shown in Figure 34, where UVLO+ and UVLO-
are the positive-going and negative-going thresholds respectively. Note that outputs VOA and VOB default low
when input side power supply (VDDI) is not present.
3.7.1. Device Startup
Outputs VOA and VOB are held low during power-up until VDD is above the UVLO threshold for time period
tSTART. Following this, the outputs follow the states of inputs VIA and VIB.
3.7.2. Undervoltage Lockout
Undervoltage Lockout (UVLO) is provided to prevent erroneous operation during device startup and shutdown or
when VDD is below its specified operating circuits range. The input (control) side, Driver A and Driver B, each have
their own undervoltage lockout monitors.
The Si824x input side enters UVLO when VDDI < VDDIUV–, and exits UVLO when VDDI > VDDIUV+. The driver
outputs, VOA and VOB, remain low when the input side of the Si824x is in UVLO and their respective VDD supply
(VDDA, VDDB) is within tolerance. Each driver output can enter or exit UVLO independently. For example, VOA
unconditionally enters UVLO when VDDA falls below VDDAUV– and exits UVLO when VDDA rises above
VDDAUV+.
Figure 34. Device Behavior during Normal Operation and Shutdown
PW M
VO A
DISABLE
VDDI
UVLO-
VDDA
tSTART
tSD
tRESTART
tPHL
tPLH
UVLO+
UVLO-
UVLO +
tSD
VDD HYS
VDDHYS
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