參數(shù)資料
型號(hào)： SJA1000
廠商： NXP SEMICONDUCTORS
元件分類： 微控制器/微處理器
英文描述： Stand-alone CAN controller(單機(jī)CAN控制器)
中文描述： 2 CHANNEL(S), 1M bps, LOCAL AREA NETWORK CONTROLLER, PDIP28
封裝： 0.600 INCH, PLASTIC, DIP-28
文件頁(yè)數(shù)： 31/68頁(yè)
文件大?。?/td> 234K
代理商： SJA1000
2000 Jan 04
31
Philips Semiconductors
Product specification
Stand-alone CAN controller
SJA1000
6.4.6
I
NTERRUPT
R
EGISTER
(IR)
The interrupt register allows the identification of an interrupt source. When one or more bits of this register are set, a CAN
interrupt will be indicated to the CPU. After this register is read by the CPU all bits are reset except for the receive interrupt
bit.
The interrupt register appears to the CPU as a read only memory.
Table 15
Bit interpretation of the interrupt register (IR); CAN address 3
BIT
SYMBOL
NAME
VALUE
FUNCTION
IR.7
BEI
Bus Error Interrupt
1
set; this bit is set when the CAN controller detects
an error on the CAN-bus and the BEIE bit is set
within the interrupt enable register
reset
set; this bit is set when the CAN controller lost the
arbitration and becomes a receiver and the ALIE
bit is set within the interrupt enable register
reset
set; this bit is set whenever the CAN controller has
reached the error passive status (at least one
error counter exceeds the protocol-defined level of
127) or if the CAN controller is in the error passive
status and enters the error active status again and
the EPIE bit is set within the interrupt enable
register
reset
set; this bit is set when the CAN controller is
sleeping and bus activity is detected and the
WUIE bit is set within the interrupt enable register
reset
set; this bit is set on a ‘0-to-1’ transition of the data
overrun status bit and the DOIE bit is set within
the interrupt enable register
reset
set; this bit is set on every change (set and clear)
of either the error status or bus status bits and the
EIE bit is set within the interrupt enable register
reset
set; this bit is set whenever the transmit buffer
status changes from ‘0-to-1’ (released) and the
TIE bit is set within the interrupt enable register
reset
set; this bit is set while the receive FIFO is not
empty and the RIE bit is set within the interrupt
enable register
reset; no more message is available within the
RXFIFO
0
1
IR.6
ALI
Arbitration Lost Interrupt
0
1
IR.5
EPI
Error Passive Interrupt
0
1
IR.4
WUI
Wake-Up Interrupt;
note 1
0
1
IR.3
DOI
Data Overrun Interrupt
0
1
IR.2
EI
Error Warning Interrupt
0
1
IR.1
TI
Transmit Interrupt
0
1
IR.0
RI
Receive Interrupt; note 2
0
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
SJA1000/N1,112 功能描述:網(wǎng)絡(luò)控制器與處理器 IC STAND-ALONE CAN CONTROLLER RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray
SJA1000/N1112 制造商:NXP Semiconductors 功能描述:IC CAN CONTROLLER 1000 DIP28
SJA1000N 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Stand-alone CAN controller
SJA1000T 制造商:NXP Semiconductors 功能描述:
SJA1000T/N,112 功能描述:網(wǎng)絡(luò)控制器與處理器 IC STAND ALONE CAN CONTROLLER RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray
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