參數(shù)資料
型號(hào): SM3E-19.44M
廠商: Connor-Winfield
文件頁數(shù): 9/36頁
文件大?。?/td> 0K
描述: IC MOD TIMING 19.440MHZ STRAT 3E
標(biāo)準(zhǔn)包裝: 1
系列: SM3
類型: 定時(shí)模塊,系統(tǒng)時(shí)鐘
PLL:
主要目的: 以太網(wǎng),ADM,DSLAM,SONET/SDH,Stratum,TDM
輸入: LVCMOS
輸出: LVCMOS
電路數(shù): 1
比率 - 輸入:輸出: 8:3
差分 - 輸入:輸出: 無/無
頻率 - 最大: 19.44MHz
電源電壓: 3.135 V ~ 3.465 V
工作溫度: 0°C ~ 70°C
安裝類型: 通孔
封裝/外殼: 32-DIP 模塊
包裝: 管件
其它名稱: CW643
SM3E 19.44M
SM3E19.44M
SM3E Data Sheet #:
TM054
Page 17 of 36 Rev: 04 Date: 01/26/11
Copyright 2011 The Connor-Winfield Corp. All Rights Reserved
Specifications subject to change without notice
FreeRun_Priority, 0x24 (R/W)
Bit7-Bit5
Bit4
Bit3
Bit2-Bit0
Enable/
Revertivity
Priority
Disable
1:Enable
0:Highest
Reserved
1:Enable
0:Disable
7:Lowest
0:Disable
Default:0
Default:0
Default:0
non-revertive
Free Run may be treated like a reference. When it is enabled, Free Run will be entered when all references of higher
priority are lost or masked. If or when a higher priority reference returns, it is switched to if Free Run is set as “re-
vertive”. When disabled, Free Run will be entered only if manually selected or all references fail without an available
Hold Over history. For equal priority value, Free Run will be treated as lower priority.
History_Policy, 0x25 (R/W)
Bit7-Bit1
Bit0
ReferenceSwitchHoldOver
HisoryPolicy
Reserved
0:Rebuild
1:Continue
Bit 0 determines if Hold Over is retained or rebuilt when a reference switch occurs. See Application Notes, Holdover
History Accumulation and Management section.
History_Cmd, 0x26 (R/W)
Bit7-Bit2
Bit1-0
HoldOverHistroyCommands
01:Saveactivehistorytobackuphistory
Reserved
10:Restoreactivehistoryfrombackup
11:Flushtheactivehistoryandaccumulationregister
00:Nocommand
Bits 0-1 are written to save a holdover history to the backup history, restore the active holdover history from the
backup, or flush the active history. The default value of the register is 00. The last command is latched and
may be read by the application. A flush does not affect the backup history. See Application Notes, Holdover
History Accumulation and Management section.
HoldOver_Time, 0x27 (R)
Bit7-Bit0
IndicatesthetimesinceenteringtheHoldOverstate.from0-255,onebitperhour.Zeroinnon-HoldOverstateandstopsat255.
Cfgdata, 0x30 (R/W)
Bit7-Bit0
Configurationdatawriteregister.
Configuration data is written to this register. Internal use only.
Cfgctr_Lo, 0x31 (R)
Bit7-Bit0
Configurationdatawritecounterlowbyte.
Low order byte of configuration data write counter. Internal use only.
Register Descriptions and Operation continued
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