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參數(shù)資料
| 型號： | SM5964Ihhk |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | 8 - bit single chip microcontroller with 64KB flash & 1K byte RAM embedded |
| 中文描述： | 8 -位單片機具有64KB閃存 |
| 文件頁數(shù)： | 4/28頁 |
| 文件大小： | 539K |
| 代理商： | SM5964IHHK |
第1頁第2頁第3頁當前第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁
July 2002
Specifications subject to change without notice,contact your sales representatives for the most recent information.
4/28
PID 5964 07/02
SyncMOS Technologies Inc. SM5964
Ver 1.0
Pin Descriptions
40L
PDIP
Pin#
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
44L
QFP
Pin#
40
41
42
43
44
1
2
3
4
5
7
8
9
10
11
12
13
14
15
16
18
19
20
21
22
23
24
25
26
27
29
30
31
32
33
34
35
36
37
38
17
28
39
6
44L
PLCC
Pin#
2
3
4
5
6
7
8
9
10
11
13
14
15
16
17
18
19
20
21
22
24
25
26
27
28
29
30
31
32
33
35
36
37
38
39
40
41
42
43
44
23
34
1
12
Symbol
Active I/O Names
T2/P1.0
T2EX/P1.1
P1.2
SPWM0/P1.3
SPWM1/P1.4
SPWM2/P1.5
SPWM3/P1.6
SPWM4/P1.7
RES
RXD/P3.0
TXD/P3.1
#INT0/P3.2
#INT1/P3.3
T0/P3.4
T1/P3.5
#WR/P3.6
#RD/P3.7
XTAL2
XTAL1
VSS
P2.0/A8
P2. 1/A9
P2.2/A10
P2.3/A11
P2.4/A12
P2.5/A13
P2.6/A14
P2.7/A15
#PSEN
ALE
#EA
P0.7/AD7
P0.6/AD6
P0.5/AD5
P0.4/AD4
P0.3/AD3
P0.2/AD2
P0.1/AD1
P0.0/AD0
VDD
P4.0
P4.1
P4.2
P4.3
i/o
i/o
i/o
i/o
i/o
i/o
i/o
i/o
i Reset
i/o
Receive data & bit 0 of port 3
i/o
Transmit data & bit 1 of port 3
i/o
low true interrupt 0 & bit 2 of port 3
i/o
low true interrupt 1 & bit 3 of port 3
i/o
Timer 0 & bit 4 of port 3
i/o
Timer 1 & bit 5 of port 3
i/o
ext. memory write & bit 6 of port 3
i/o
ext. memory read & bit 7 of port 3
o
Crystal out
i
Crystal in
Sink Voltage, Ground
i/o
bit 0 of port 2 & bit 8 of external memory address
i/o
bit 1 of port 2 & bit 9 of external memory address
i/o
bit 2 of port 2 & bit 10 of external memory address
i/o
bit 3 of port 2 & bit 11 of external memory address
i/o
bit 4 of port 2 & bit 12 of external memory address
i/o
bit 5 of port 2 & bit 13 of external memory address
i/o
bit 6 of port 2 & bit 14 of external memory address
i/o
bit 7 of port 2 & bit 15 of external memory address
o
program storage enable
o
address latch enable
i
external access
i/o
bit 7 of port 0 & data/address bit 7 of external memory
i/o
bit 6 of port 0 & data/address bit 6 of external memory
i/o
bit 5 of port 0 & data/address bit 5 of external memory
i/o
bit 4 of port 0 & data/address bit 4 of external memory
i/o
bit 3 of port 0 & data/address bit 3 of external memory
i/o
bit 2 of port 0 & data/address bit 2 of external memory
i/o
bit 1 of port 0 & data/address bit 1 of external memory
i/o
bit 0 of port 0 & data/address bit 0 of external memory
Drive Voltage
i/o
bit 0 of Port 4
i/o
bit 1 of Port 4
i/o
bit 2 of Port 4
i/o
bit 3 of Port 4
timer 2 clock out & bit 0 of port 1
timer 2 control & bit 1 of port 1
bit 2 of port 1
SPWM Channel 0, bit 3 of port 1
SPWM Channel 1, bit 4 of port 1
SPWM Channel 2, bit 5 of port 1
SPWM Channel 3, bit 6 of port 1
SPWM Channel 4, bit 7 of port 1
H
L/ -
L/ -
L/ -
L/ -
L
-
L
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