- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄373435 > SN54ABTH18652A (Texas Instruments, Inc.) Scan Test Devices With 18 Bit Universal Bus Transceivers and Registers( 掃描檢測(cè)裝置，帶18位總線收發(fā)器和寄存器) PDF資料下載
參數(shù)資料
| 型號(hào)： | SN54ABTH18652A |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | Scan Test Devices With 18 Bit Universal Bus Transceivers and Registers( 掃描檢測(cè)裝置，帶18位總線收發(fā)器和寄存器) |
| 中文描述： | 掃描測(cè)試設(shè)備與18位通用總線收發(fā)器和寄存器（掃描檢測(cè)裝置，帶18位總線收發(fā)器和寄存器） |
| 文件頁數(shù)： | 16/36頁 |
| 文件大?。?/td> | 848K |
| 代理商： | SN54ABTH18652A |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁當(dāng)前第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁
SN54ABTH18652A, SN54ABTH182652A, SN74ABTH18652A, SN74ABTH182652A
SCAN TEST DEVICES WITH
18-BIT BUS TRANSCEIVERS AND REGISTERS
SCBS167D – AUGUST 1993 – REVISED JULY 1996
16
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
boundary-control register opcode description
The BCR opcodes are decoded from BCR bits 2–0 as shown in Table 4. The selected test operation is
performed while the RUNT instruction is executed in the Run-Test/Idle state. The following descriptions detail
the operation of each BCR instruction and illustrate the associated PSA and PRPG algorithms.
Table 4. Boundary-Control Register Opcodes
BINARY CODE
BIT 2
→
BIT 0
MSB
→
LSB
X00
DESCRIPTION
Sample inputs/toggle outputs (TOPSIP)
X01
Pseudo-random pattern generation/36-bit mode (PRPG)
X10
Parallel-signature analysis/36-bit mode (PSA)
011
Simultaneous PSA and PRPG/18-bit mode (PSA/PRPG)
111
Simultaneous PSA and binary count up/18-bit mode (PSA/COUNT)
While the control input BSCs (bits 47–36) are not included in the toggle, PSA, PRPG, or COUNT algorithms,
the output-enable BSCs (bits 47–44 of the BSR) control the drive state (active or high impedance) of the
selected device output pins. These BCR instructions are valid only when both bytes of the device are operating
in one direction of data flow (that is, 1OEAB
=
1OEBA and 2OEAB
=
2OEBA) and in the same direction of data
flow (that is, 1OEAB
=
2OEAB and 1OEBA
=
2OEBA). Otherwise, the bypass instruction is operated.
sample inputs/toggle outputs (TOPSIP)
Data appearing at the selected device input-mode I/O pins is captured in the shift-register elements of the
associated BSCs on each rising edge of TCK. Data in the shift-register elements of the selected output-mode
BSCs is toggled on each rising edge of TCK, updated in the shadow latches, and applied to the associated
device I/O pins on each falling edge of TCK.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| SN54ABTH245FK | OCTAL BUS TRANSCEIVERS WITH 3-STATE OUTPUTS |
| SN74ABTH245DB | OCTAL BUS TRANSCEIVERS WITH 3-STATE OUTPUTS |
| SN74ABTH245DGV | OCTAL BUS TRANSCEIVERS WITH 3-STATE OUTPUTS |
| SN74ABTH245PW | OCTAL BUS TRANSCEIVERS WITH 3-STATE OUTPUTS |
| SN54ABTH245J | OCTAL BUS TRANSCEIVERS WITH 3-STATE OUTPUTS |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| SN54ABTH18652AHV | 制造商:TI 制造商全稱:Texas Instruments 功能描述:SCAN TEST DEVICES WITH 18-BIT BUS TRANSCEIVERS AND REGISTERS |
| SN54ABTH245 | 制造商:TI 制造商全稱:Texas Instruments 功能描述:OCTAL BUS TRANSCEIVERS WITH 3-STATE OUTPUTS |
| SN54ABTH245FK | 制造商:TI 制造商全稱:Texas Instruments 功能描述:OCTAL BUS TRANSCEIVERS WITH 3-STATE OUTPUTS |
| SN54ABTH245J | 制造商:TI 制造商全稱:Texas Instruments 功能描述:OCTAL BUS TRANSCEIVERS WITH 3-STATE OUTPUTS |
| SN54ABTH245W | 制造商:TI 制造商全稱:Texas Instruments 功能描述:OCTAL BUS TRANSCEIVERS WITH 3-STATE OUTPUTS |
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。