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參數(shù)資料
| 型號(hào)： | SN74ALVC16827 |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | 20-Bit Buffers/Drivers With 3-State Outputs(20位緩沖器/驅(qū)動(dòng)器（三態(tài)輸出）) |
| 中文描述： | 20位緩沖器/驅(qū)動(dòng)器，三態(tài)輸出（20位緩沖器/驅(qū)動(dòng)器（三態(tài)輸出）） |
| 文件頁數(shù)： | 1/5頁 |
| 文件大?。?/td> | 93K |
| 代理商： | SN74ALVC16827 |
SN74ALVC16827
20-BIT BUFFER/DRIVER
WITH 3-STATE OUTPUTS
SCAS272 – JANUARY 1993 – REVISED MARCH 1994
Copyright
1994, Texas Instruments Incorporated
9–1
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
Member of the Texas Instruments
Widebus
Family
EPIC
(Enhanced-Performance Implanted
CMOS) Submicron Process
Designed to Facilitate Incident-Wave
Switching for Line Impedances of 50
or Greater
Typical V
OLP
(Output Ground Bounce)
< 0.8 V at V
CC
= 3.3 V, T
A
= 25
°
C
Typical V
OHV
(Output V
OH
Undershoot)
> 2 V at V
CC
= 3.3 V, T
A
= 25
°
C
Bus-Hold On Data Inputs Eliminates the
Need for External Pullup/Pulldown
Resistors
Package Options Include Plastic 300-mil
Shrink Small-Outline (DL) and Thin Shrink
Small-Outline (DGG) Packages
description
This 20-bit noninverting buffer/driver is designed
for 2.7-V to 3.6-V V
CC
operation.
The SN74ALVC16827 is composed of two 10-bit
sections with separate output-enable signals. For
either 10-bit buffer section, the two output-enable
(1OE1 and 1OE2 or 2OE1 and 2OE2) inputs must
both be low for the corresponding Y outputs to be
active. If either output-enable input is high, the
outputs of that 10-bit buffer section are in the
high-impedance state.
The SN74ALVC16827 is available in TI’s shrink
small-outline (DL) and thin shrink small-outline
(DGG) packages, which provide twice the I/O pin
count and functionality of standard small-outline
packages in the same printed-circuit-board area.
The SN74ALVC16827 is characterized for
operation from –40
°
C to 85
°
C.
FUNCTION TABLE
(each 10-bit section)
INPUTS
OUTPUT
Y
OE1
L
OE2
L
A
L
L
L
L
H
H
H
X
X
Z
X
H
X
Z
DGG OR DL PACKAGE
(TOP VIEW)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
1OE1
1Y1
1Y2
GND
1Y3
1Y4
V
CC
1Y5
1Y6
1Y7
GND
1Y8
1Y9
1Y10
2Y1
2Y2
2Y3
GND
2Y4
2Y5
2Y6
V
CC
2Y7
2Y8
GND
2Y9
2Y10
2OE1
1OE2
1A1
1A2
GND
1A3
A14
V
CC
1A5
1A6
1A7
GND
1A8
1A9
1A10
2A1
2A2
2A3
GND
2A4
2A5
2A6
V
CC
2A7
2A8
GND
2A9
2A10
2OE2
PRODUCT PREVIEW information concerns products in the formative or
design phase of development. Characteristic data and other
specifications are design goals. Texas Instruments reserves the right to
change or discontinue these products without notice.
EPIC and Widebus are trademarks of Texas Instruments Incorporated.
P
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| SN74ALVC16834DGVR | 功能描述:通用總線函數(shù) 18bit Univ Bus RoHS:否 制造商:Texas Instruments 邏輯類型:CMOS 邏輯系列:74VMEH 電路數(shù)量:1 開啟電阻（最大值）: 傳播延遲時(shí)間:10.1 ns 電源電壓-最大:3.45 V 電源電壓-最小:3.15 V 最大工作溫度:+ 85 C 最小工作溫度:0 C 封裝 / 箱體:TSSOP-48 封裝:Reel |
| SN74ALVC16834DL | 功能描述:通用總線函數(shù) 18bit Univ Bus RoHS:否 制造商:Texas Instruments 邏輯類型:CMOS 邏輯系列:74VMEH 電路數(shù)量:1 開啟電阻（最大值）: 傳播延遲時(shí)間:10.1 ns 電源電壓-最大:3.45 V 電源電壓-最小:3.15 V 最大工作溫度:+ 85 C 最小工作溫度:0 C 封裝 / 箱體:TSSOP-48 封裝:Reel |
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