參數(shù)資料
型號(hào): SP791EP
英文描述: Low Power Microprocessor Supervisory with Battery Switch-Over
中文描述: 低功耗微處理器監(jiān)控與電池開關(guān)過
文件頁數(shù): 12/19頁
文件大小: 202K
代理商: SP791EP
SP791DS/08 SP791 Low Power Microprocessor Supervisory with Battery Switch-Over
Copyright 2000 Sipex Corporation
12
POWER-FAIL INPUT
The Power-Fail Input (PFI) has a guaranteed
input leakage of +/-25nA max over temperature.
The typical comparator delay is 15
μ
s from V
IL
to V
OL
(power failing), and 55
μ
s from V
IH
to
V
OH
(power being restored). Connect PFI to
ground if not used.
POWER-FAIL OUTPUT
The Power-Fail Output (PFO) goes low when
PFI falls below 1.25V. It sinks 3.2mA with a
saturation voltage of 0.1V. With PFI above
1.25V, PFO is actively pulled to V
OUT
. Con-
necting PFI through a voltage divider to an un-
regulated supply allows PFO to generate an NMI
as the unregulated power begins to fall (see
Figure 9b
).
LOWLINE OUTPUT
The low-line comparator monitors V
CC
with a
typical threshold voltage 150mV above the re-
set threshold and has 15mV of hysteresis.
LOWLINE typically sinks 3.2mA at 0.1V. For
normal operation (Vcc above the LOWLINE
threshold), LOWLINE is pulled to V
OUT
. If ac-
cess to the unregulated supply is unavailable,
use LOWLINE to provide a nonmaskable in-
terrupt (NMI) to the
μ
P as shown in
Figure 9a
.
POWER-FAIL COMPARATOR
The power-fail comparator is an uncommitted
comparator that has no effect on the other func-
tions of the
SP791
. Common uses include moni-
toring supplies other than 5V (see the
Typical
Operating Circuit
and the
Monitoring a Nega-
tive Voltage
section) and early power-fail de-
tection when the unregulated power is easily ac-
cessible as shown in
Figure 9b
.
Figure 9. a) If the unregulated supply is inaccessible, LOWLINE generates the NMI for the
μ
P.
b) Use PFO to generate the
μ
P NMI if the unregulated supply is accessible.
FROM
REGULATED
SUPPLY
0.1
μ
F
3
2
1
15
10
11
0.1
μ
F
3.0V
4
POWER TO
CMOS RAM
μ
P
RESET
NMI
I/O LINE
RESET
LOWLINE
WDI
GND
V
BATT
V
OUT
Vcc
C orporation
UNREGULATED
SUPPLY
a.)
b.)
μ
P POWER
3
2
1
15
6
11
0.1
μ
F
3.0V
4
POWER TO
CMOS RAM
μ
P
RESET
NMI
I/O LINE
RESET
PFO
WDI
GND
V
BATT
V
OUT
Vcc
C orporation
μ
P POWER
PFI
7
0.1
μ
F
VOLTAGE
REGULATOR
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