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參數(shù)資料
| 型號： | SP791EP |
| 英文描述： | Low Power Microprocessor Supervisory with Battery Switch-Over |
| 中文描述： | 低功耗微處理器監(jiān)控與電池開關過 |
| 文件頁數(shù)： | 16/19頁 |
| 文件大?。?/td> | 202K |
| 代理商： | SP791EP |
SP791DS/08 SP791 Low Power Microprocessor Supervisory with Battery Switch-Over
Copyright 2000 Sipex Corporation
16
Figure 16. Watchdog Flow Diagram
Figure 15. Monitoring a Negative Voltage
NEGATIVE-GOING V
CC
TRANSIENTS
The
SP791
is relatively immune to short-dura-
tion negative-going V
CC
transients resulting
from power up, power down, and brownout con-
ditions. It is usually undesirable to reset the
μ
P
when V
CC
experiences only small glitches.
Typically, a V
CC
transient that goes 100mV be-
low the reset threshold and lasts for 40
μ
s or less
will not cause a reset pulse to be issued.
A 100nF bypass capacitor mounted close to the
V
CC
pin provides additional transient immunity.
CONNECTING A TIMING CAPACITOR
TO THE SWT PIN
To prevent timing errors minimize external cur-
rent leakage sources at this pin, and locate the
capacitor as close to SWT as possible. The sum
of PC board leakage + SWT capacitor leakage
must be small compared to
±
100 nA.
WATCHDOG SOFTWARE
CONSIDERATIONS
A way to help the watchdog timer keep a closer
watch on software execution involves setting
and resetting the watchdog input at different
points in the program, rather than "pulsing" the
watchdog input high-low-high or low-high-low.
This technique avoids a "stuck" loop where the
watchdog timer continues to be reset within the
loop, keeping the watchdog from timing out.
Figure 16
shows an example flow diagram
where the I/O driving the watchdog input is set
low at the beginning of the program, set high at
the beginning of every subroutine or loop, then
set low again when the program returns to the
beginning. If the program should "hang" in any
subroutine, the I/O is continually set high and
the watchdog timer is allowed to time out, caus-
ing a reset or interrupt to be issued.
MAXIMUM VCC FALL TIME
The V
CC
fall time is limited by the propagation
delay of the battery switchover comparator and
should not exceed 0.03V/
μ
s. A standard rule of
thumb for filter capacitance on most regulators
is on the order of 100
μ
F per amp of current.
When the power supply is shut off or the main
battery is disconnected, the associated initial
V
CC
fall rate is just the inverse of 1A/100
μ
F =
0.01V/
μ
s. The V
CC
fall rate decreases with time
as V
CC
falls exponentially, which more than sat-
isfies the maximum fall-time requirement.
+5V
R1
R2
V–
PFO
0V
+5V
V
TRIP
0V
GND
PFI
Vcc
PFO
5 - 1.25 =
TRIP
R1 R2
NOTE: V
TRIP
IS NEGATIVE.
C orporation
V–
START
SET
WDI
LOW
SUBROUTINE
OR PROGRAM LOOP
SET WDI
HIGH
RETURN
END
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