參數(shù)資料
型號(hào)： SST89V58RD2-33-I-NJE
廠商： Microchip Technology
文件頁數(shù)： 37/92頁
文件大小： 0K
描述： IC MCU 8BIT 40KB FLASH 44PLCC
標(biāo)準(zhǔn)包裝： 27
系列： FlashFlex®
核心處理器： 8051
芯體尺寸： 8-位
速度： 33MHz
連通性： EBI/EMI，SPI，UART/USART
外圍設(shè)備： 欠壓檢測/復(fù)位，POR，WDT
輸入/輸出數(shù)： 36
程序存儲(chǔ)器容量： 32KB（32K x 8）
程序存儲(chǔ)器類型： 閃存
EEPROM 大?。?/td> 8K x 8
RAM 容量： 1K x 8
電壓 - 電源 (Vcc/Vdd)： 2.7 V ~ 3.6 V
振蕩器型： 外部
工作溫度： -40°C ~ 85°C
封裝/外殼： 44-LCC（J 形引線）
包裝： 管件
2011 Silicon Storage Technology, Inc.
DS25087A
10/11
42
FlashFlex MCU
SST89V54RD2/RD / SST89V58RD2/RD
Not Recommended for New Designs
A Microchip Technology Company
Interrupt Termination
If interrupt termination is selected, (SFCM[7] is set), then an interrupt (INT1) will be generated to indi-
cate flash operation completion. Under this condition, the INT1 becomes an internal interrupt source.
The INT1# pin can now be used as a general purpose port pin and it cannot be the source of External
Interrupt 1 during in-application programming.
In order to use an interrupt to signal flash operation termination. EX1 and EA bits of IE register must be
set. The IT1 bit of TCON register must also be set for edge trigger detection.
Note: DISIAPL pin in PLCC or TQFP will also disable IAP commands if it is externally pulled low when reset.
Table 13: IAP Commands1
1. SFCF[6]=1 enables IAP commands; SFCF[6]=0 disables IAP commands.
Operation
SFCM [6:0]2
2. Interrupt/Polling enable for flash operation completion
SFCM[7] =1: Interrupt enable for flash operation completion
0: polling enable for flash operation completion
SFDT [7:0]
SFAH [7:0]
SFAL [7:0]
Chip-Erase3
3. Chip-Erase only functions in IAP mode when EA#=0 (external memory execution) and device is not in level 4 locking.
01H
55H
X4
4. X can be VIL or VIH, but no other value.
X
Block-Erase
0DH
55H
AH5
5. AH = Address high order byte
X
Sector-Erase
0BH
X
AH
AL6
6. AL = Address low order byte
Byte-Program
0EH
DI7
7. DI = Data Input, DO = Data Output, all other values are in hex.
AH
AL
Byte-Verify (Read)8
8. SFAH[7:5] = 111b selects Block 1, SFAH[7] = 0b selects Block 0
0CH
DO7
AH
AL
Prog-SB19
9. Instruction must be located in Block 1 or external code memory.
0FH
AAH
X
Prog-SB29
03H
AAH
X
Prog-SB39
05H
AAH
X
Prog-SC09
09H
AAH
5AH
X
Prog-SC19
09H
AAH
X
Enable-Clock-Double9
08H
AAH
55H
X
T0-0.0 25087
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參數(shù)描述
SST89V58RD2-33-I-NJE1 制造商:SST 制造商全稱:Silicon Storage Technology, Inc 功能描述:FlashFlex51 MCU
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SST89V58RD2-33-I-PIE1 制造商:SST 制造商全稱:Silicon Storage Technology, Inc 功能描述:FlashFlex51 MCU
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