- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄372304 > ST62E94F1 IC PSRAM 32MB 54-VFBGA PDF資料下載
參數(shù)資料
| 型號： | ST62E94F1 |
| 英文描述： | IC PSRAM 32MB 54-VFBGA |
| 中文描述： | 通信集成電路 |
| 文件頁數(shù)： | 12/82頁 |
| 文件大?。?/td> | 870K |
| 代理商： | ST62E94F1 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁當(dāng)前第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁第80頁第81頁第82頁
12/82
ST62T18C/E18C
MEMORY MAP
(Cont’d)
1.3.6 Data RAM Bank Register (DRBR)
Address: CBh
—
Write only
Bit 7-5 = These bits are not used
Bit 4
-
DRBR4
. This bit, when set, selects RAM
Page 2.
Bit 3 -
DRBR3
. This bit, when set, selects RAM
Page 1.
Bit 2.0 These bits are not used.
The selection of the bank is made by programming
the Data RAM Bank Switch register (DRBR regis-
ter) located at address CBh of the Data Space ac-
cording to Table 1. No more than one bank should
be set at a time.
The DRBR register can be addressed like a RAM
Data Space location at the address CBh; never-
theless it is a write only register that cannot be ac-
cessed with single-bit operations. This register is
used to select the desired 64-byte RAM bank of
the Data Space. The number of banks has to be
loaded in the DRBR register and the instruction
has to point to the selected location as if it was in
bank 0 (from 00h address to 3Fh address).
This register is not cleared during the MCU initiali-
zation, therefore it must be written before the first
access to the Data Space bank region. Refer to
the Data Space description for additional informa-
tion. The DRBR register is not modified when an
interrupt or a subroutine occurs.
Notes
:
Care is required when handling the DRBR register
as it is write only. For this reason, it is not allowed
to change the DRBR contents while executing in-
terrupt service routine, as the service routine can-
not save and then restore its previous content. If it
is impossible to avoid the writing of this register in
interrupt service routine, an image of this register
must be saved in a RAM location, and each time
the program writes to DRBR it must write also to
the image register. The image register must be
written first, so if an interrupt occurs between the
two instructions the DRBR is not affected.
In DRBR Register, only 1 bit must be set. Other-
wise two or more pages are enabled in parallel,
producing errors.
Table 5. Data RAM Bank Register Set-up
7
0
-
-
-
DRBR4 DRBR3
-
-
-
DRBR
00h
01h
02h
08h
10h
other
ST62T18C/E18C
None
Reserved
Reserved
RAM Page 1
RAM Page 2
Reserved
12
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| ST62P18CB1 | 8-BIT MICROCONTROLLER ( MCU ) WITH OTP. ROM. FASTROM. A/D CONVERTER. 8-BIT AUTO-RELOAD TIMER. UART. OSG. SAFE RESET AND 20 PINS |
| ST62P18CB3 | 8-BIT MICROCONTROLLER ( MCU ) WITH OTP. ROM. FASTROM. A/D CONVERTER. 8-BIT AUTO-RELOAD TIMER. UART. OSG. SAFE RESET AND 20 PINS |
| ST62P18CM1 | 8-BIT MICROCONTROLLER ( MCU ) WITH OTP. ROM. FASTROM. A/D CONVERTER. 8-BIT AUTO-RELOAD TIMER. UART. OSG. SAFE RESET AND 20 PINS |
| ST62P18CM6 | SDRAM 60 PIN BGA 16MBIT X 16 WIDE 60BGA |
| ST62T01CB3 | MICROCONTROLLER|8-BIT|ST6200 CPU|CMOS|DIP|16PIN|PLASTIC |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ST62EBF1 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:8-Bit Microcontroller |
| ST62EXX-EPB | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:EPROM PROGRAMMING BOARDS FOR ST62 MCU FAMILY |
| ST62EXX-GP | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:GANG PROGRAMMERS FOR ST62 MCU FAMILY |
| ST62GP-DBE | 功能描述:開發(fā)板和工具包 - 其他處理器 ST6 Dedication Board RoHS:否 制造商:Freescale Semiconductor 產(chǎn)品:Development Systems 工具用于評估:P3041 核心:e500mc 接口類型:I2C, SPI, USB 工作電源電壓: |
| ST62GP-EMU2 | 功能描述:仿真器/模擬器 ST62 Emulator Board RoHS:否 制造商:Blackhawk 產(chǎn)品:System Trace Emulators 工具用于評估:C6000, C5000, C2000, OMAP, DAVINCI, SITARA, TMS470, TMS570, ARM 7/9, ARM Cortex A8/R4/M3 用于:XDS560v2 |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。