- 您現(xiàn)在的位置：買(mǎi)賣(mài)IC網(wǎng) > PDF目錄98145 > ST72T774S9T1 (STMICROELECTRONICS) 8-BIT, OTPROM, 8 MHz, MICROCONTROLLER, PQFP44 PDF資料下載
參數(shù)資料
| 型號(hào)： | ST72T774S9T1 |
| 廠商： | STMICROELECTRONICS |
| 元件分類(lèi)： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, OTPROM, 8 MHz, MICROCONTROLLER, PQFP44 |
| 封裝： | TQFP-44 |
| 文件頁(yè)數(shù)： | 3/144頁(yè) |
| 文件大?。?/td> | 1280K |
| 代理商： | ST72T774S9T1 |
第1頁(yè)第2頁(yè)當(dāng)前第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)第13頁(yè)第14頁(yè)第15頁(yè)第16頁(yè)第17頁(yè)第18頁(yè)第19頁(yè)第20頁(yè)第21頁(yè)第22頁(yè)第23頁(yè)第24頁(yè)第25頁(yè)第26頁(yè)第27頁(yè)第28頁(yè)第29頁(yè)第30頁(yè)第31頁(yè)第32頁(yè)第33頁(yè)第34頁(yè)第35頁(yè)第36頁(yè)第37頁(yè)第38頁(yè)第39頁(yè)第40頁(yè)第41頁(yè)第42頁(yè)第43頁(yè)第44頁(yè)第45頁(yè)第46頁(yè)第47頁(yè)第48頁(yè)第49頁(yè)第50頁(yè)第51頁(yè)第52頁(yè)第53頁(yè)第54頁(yè)第55頁(yè)第56頁(yè)第57頁(yè)第58頁(yè)第59頁(yè)第60頁(yè)第61頁(yè)第62頁(yè)第63頁(yè)第64頁(yè)第65頁(yè)第66頁(yè)第67頁(yè)第68頁(yè)第69頁(yè)第70頁(yè)第71頁(yè)第72頁(yè)第73頁(yè)第74頁(yè)第75頁(yè)第76頁(yè)第77頁(yè)第78頁(yè)第79頁(yè)第80頁(yè)第81頁(yè)第82頁(yè)第83頁(yè)第84頁(yè)第85頁(yè)第86頁(yè)第87頁(yè)第88頁(yè)第89頁(yè)第90頁(yè)第91頁(yè)第92頁(yè)第93頁(yè)第94頁(yè)第95頁(yè)第96頁(yè)第97頁(yè)第98頁(yè)第99頁(yè)第100頁(yè)第101頁(yè)第102頁(yè)第103頁(yè)第104頁(yè)第105頁(yè)第106頁(yè)第107頁(yè)第108頁(yè)第109頁(yè)第110頁(yè)第111頁(yè)第112頁(yè)第113頁(yè)第114頁(yè)第115頁(yè)第116頁(yè)第117頁(yè)第118頁(yè)第119頁(yè)第120頁(yè)第121頁(yè)第122頁(yè)第123頁(yè)第124頁(yè)第125頁(yè)第126頁(yè)第127頁(yè)第128頁(yè)第129頁(yè)第130頁(yè)第131頁(yè)第132頁(yè)第133頁(yè)第134頁(yè)第135頁(yè)第136頁(yè)第137頁(yè)第138頁(yè)第139頁(yè)第140頁(yè)第141頁(yè)第142頁(yè)第143頁(yè)第144頁(yè)
ST72774/ST727754/ST72734
100/144
DDC INTERFACE (Cont’d)
The Write and Read operations allow the EDID
data to be downloaded during factory alignment
(for example).
Writes to the memory by the DMA engine can be
inhibited by means of the WP bit in the DCR
register.
A write of the last data structure byte sets a flag
and may be programmed to generate an interrupt
request.
The Data address (sub-address) is either the
second byte of write transfers or is pointed to by
the
internal
address
counter
automatically
incremented after each byte transfer.
Physical address mapping of the data structure
within the memory space is performed with a
dedicated register accessible by software.
4.8.5.1.2 Mode description
DDC1 Mode: This mode is only enabled when the
DDC v2 or P&D-DDC v2 standards are validated. It
transmits only the EDID v1 data (128 bytes).
To switch the DDC1/2B Interface to DDC1 mode,
software must first clear the CF0 bit in the DCR
register while the HWPE bit=0 and then set the
HWPE bit to enable the DDC1/2B Interface.
A proper initialization sequence (see Figure 59)
must supply nine clock pulses on the VSYNCI pin
in order to internally synchronize the device.
During this initialization sequence, the SDA pin is
in high impedance. On the rising edge of the 10th
pulse applied on VSYNCI, the device outputs on
SDA the most significant (MSB) bit of the byte
located at data address 00h.
A byte is clocked out by means of 9 clock pulses
on Vsync, 8 clock pulses for the data byte itself and
an extra pulse for a Don’t Care bit.
As long as SCL is not held low, each byte of the
memory array is transmitted serially on SDA.
The internal address counter is incremented
automatically until the last byte is transmitted.
Then, it rolls over to relative location 00h.
The physical mapping of the data structure
depends on the configuration and on the content of
the AHR register which can be set by software
(see Figure 60).
Figure 59. DDC1 Waveforms
Vsync
SDA
12
8
9
Bit 7
10
11
PE
SCL
Bit 6
ALR
00h
XX
Vsync
SDA
Bit 7
PE
SCL
Bit 6
ALR
00h
7Fh
Bit 7
Bit 6
Bit 0
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| ST7294C6B6 | 8-BIT, MROM, 4 MHz, MICROCONTROLLER, PDIP28 |
| ST72T94C6M6 | 8-BIT, OTPROM, MICROCONTROLLER, PDSO28 |
| ST72C171K2B6 | 8-BIT, FLASH, 8 MHz, MICROCONTROLLER, PDIP32 |
| ST72E85A5G0 | 8-BIT, UVPROM, 4.332 MHz, MICROCONTROLLER, CQFP80 |
| ST72F321J9T7 | 8-BIT, FLASH, 8 MHz, MICROCONTROLLER, PQFP44 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ST730 | 制造商:IRF 制造商全稱(chēng):International Rectifier 功能描述:PHASE CONTROL THYRISTORS Hockey Puk Version |
| ST7-30 | 制造商:SUPERWORLD 制造商全稱(chēng):Superworld Electronics 功能描述:POWER TRANSFORMER |
| ST-7300 | 制造商:GC Electronics 功能描述: |
| ST730186-3 | 制造商:KEMET Corporation 功能描述: 制造商:KET 功能描述: |
| ST730268-1 | 制造商:KEMET Corporation 功能描述: 制造商:KET 功能描述: |
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。