參數(shù)資料
型號(hào): T436432B-8SG
廠商: TM Technology, Inc.
英文描述: 2M x 32 SDRAM 512K x 32bit x 4Banks Synchronous DRAM
中文描述: 200萬× 32內(nèi)存為512k × 32 x 4Banks同步DRAM
文件頁數(shù): 24/72頁
文件大?。?/td> 731K
代理商: T436432B-8SG
TE
CH
tm
Figure 5. Self Refresh Entry & Exit Cycle
T436432B
TM Technology Inc. reserves the right
P. 24
to change products or specifications without notice.
Publication Date: FEB. 2007
Revision: A
CLK
CKE
CS#
RAS#
CAS#
BS0,1
A0-A9
WE#
DQM
T0
T1
T2
T3
T4
T5
T6
T7
T8
T9
T10
T11
T12
T13
T14
T15
T16
T17
T18
T19
DQ
*
Note 1
*Note 2
t
IS
*Note 3
*Note 4
t
RC(min)
*Note 7
*Note 5
*Note 6
*Note 8
*Note 8
Hi-Z
Hi-Z
Self Refresh Enter
SelfRefresh Exit
AutoRefresh
t
SRX
t
PDE
Note: To Enter SelfRefresh Mode
1. CS#, RAS# & CAS# with CKE should be low at the same clock cycle.
2. After 1 clock cycle, all the inputs including the system clock can be don't care except for CKE.
3. The device remains in SelfRefresh mode as long as CKE stays "low".
4. Once the device enters SelfRefresh mode, minimum t
RAS
is required before exit from SelfRefresh.
To Exit SelfRefresh Mode
5. System clock restart and be stable before returning CKE high.
6. Enable CKE and CKE should be set high for minimum time of t
SRX
.
7. CS# starts from high.
8. Minimum t
RC
is required after CKE going high to complete SelfRefresh exit.
9. 4096 cycles of burst AutoRefresh is required before SelfRefresh entry and after SelfRefresh exit if the system
uses burst refresh.
相關(guān)PDF資料
PDF描述
T436432B 2M x 32 SDRAM 512K x 32bit x 4Banks Synchronous DRAM
T436432B-10S 2M x 32 SDRAM 512K x 32bit x 4Banks Synchronous DRAM
T436432B-10SG 2M x 32 SDRAM 512K x 32bit x 4Banks Synchronous DRAM
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T436432B-55SG 2M x 32 SDRAM 512K x 32bit x 4Banks Synchronous DRAM
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