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| 型號(hào)： | T89C51CC02UA-SITIM |
| 廠商： | Atmel |
| 文件頁(yè)數(shù)： | 75/159頁(yè) |
| 文件大?。?/td> | 0K |
| 描述： | IC 8051 MCU FLASH 16K 28PLCC |
| 標(biāo)準(zhǔn)包裝： | 37 |
| 系列： | AT89C CAN |
| 核心處理器： | 8051 |
| 芯體尺寸： | 8-位 |
| 速度： | 40MHz |
| 連通性： | CAN，UART/USART |
| 外圍設(shè)備： | POR，PWM，WDT |
| 輸入/輸出數(shù)： | 20 |
| 程序存儲(chǔ)器容量： | 16KB（16K x 8） |
| 程序存儲(chǔ)器類型： | 閃存 |
| EEPROM 大?。?/td> | 2K x 8 |
| RAM 容量： | 512 x 8 |
| 電壓 - 電源 (Vcc/Vdd)： | 3 V ~ 5.5 V |
| 數(shù)據(jù)轉(zhuǎn)換器： | A/D 8x10b |
| 振蕩器型： | 外部 |
| 工作溫度： | -40°C ~ 85°C |
| 封裝/外殼： | 28-PLCC |
| 包裝： | 管件 |
| 配用： | AT89STK-06-ND - KIT DEMOBOARD 8051 MCU W/CAN |
| 其它名稱： | T89C51CC02UASITIM |
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22
AT/T89C51CC02
4126L–CAN–01/08
Reset Recommendation
to Prevent Flash
Corruption
When a Flash program memory is embedded on-chip, it is strongly recommended to
use an external reset chip (brown out device) to apply a reset (Figure 7). It prevents sys-
tem malfunction during periods of insufficient power-supply voltage (power-supply
failure, power supply switched off, etc.).
Idle Mode
Idle mode is a power reduction mode that reduces the power consumption. In this mode,
program execution halts. Idle mode freezes the clock to the CPU at known states while
the peripherals continue to be clocked. The CPU status before entering Idle mode is
preserved, i.e., the program counter and program status word register retain their data
for the duration of Idle mode. The contents of the SFRs and RAM are also retained. The
status of the Port pins during Idle mode is detailed in Table 15.
Entering Idle Mode
To en ter Idle mo de, set th e IDL bit in PCON register (Se e Ta ble 16 ). Th e
A/T89C51CC02 enters Idle mode upon execution of the instruction that sets IDL bit. The
instruction that sets IDL bit is the last instruction executed.
Note:
If IDL bit and PD bit are set simultaneously, the A/T89C51CC02 enters Power-down
mode. Then it does not go in Idle mode when exiting Power-down mode.
Exiting Idle Mode
There are two ways to exit Idle mode:
1.
Generate an enabled interrupt.
Hardware clears IDL bit in PCON register which restores the clock to the CPU. Exe-
cution resumes with the interrupt service routine. Upon completion of the interrupt
service routine, program execution resumes with the instruction immediately follow-
ing the instruction that activated Idle mode. The general purpose flags (GF1 and
GF0 in PCON register) may be used to indicate whether an interrupt occurred dur-
ing normal operation or during Idle mode. When Idle mode is exited by an interrupt,
the interrupt service routine may examine GF1 and GF0.
2.
Generate a reset.
A logic high on the RST pin clears IDL bit in PCON register directly and asynchro-
nously. This restores the clock to the CPU. Program execution momentarily
resumes with the instruction immediately following the instruction that activated the
Idle mode and may continue for a number of clock cycles before the internal reset
algorithm takes control. Reset initializes the A/T89C51CC02 and vectors the CPU to
address C:0000h.
Notes:
1. During the time that execution resumes, the internal RAM cannot be accessed; how-
ever, it is possible for the Port pins to be accessed. To avoid unexpected outputs at
the Port pins, the instruction immediately following the instruction that activated Idle
mode should not write to a Port pin or to the external RAM.
2. If Idle mode is invoked by ADC Idle, the ADC conversion completion will exit Idle.
Power-down Mode
The Power-down mode places the A/T89C51CC02 in a very low power state. Power-
down mode stops the oscillator, freezes all clock at known states. The CPU status prior
to entering Power-down mode is preserved, i.e., the program counter, program status
word register retain their data for the duration of Power-down mode. In addition, the
SFRs and RAM contents are preserved. The status of the Port pins during Power-down
mode is detailed in Table 15.
Entering Power-down Mode
To enter Power-down mode, set PD bit in PCON register. The A/T89C51CC02 enters
the Power-down mode upon execution of the instruction that sets PD bit. The instruction
that sets PD bit is the last instruction executed.
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| T89C51CC02UA-TDSIM | 功能描述:IC 8051 MCU FLASH 16K 24-SOIC RoHS:否 類別:集成電路 (IC) >> 嵌入式 - 微控制器， 系列:AT89C CAN 標(biāo)準(zhǔn)包裝:9 系列:87C 核心處理器:8051 芯體尺寸:8-位 速度:40/20MHz 連通性:UART/USART 外圍設(shè)備:POR，WDT 輸入/輸出數(shù):32 程序存儲(chǔ)器容量:32KB（32K x 8） 程序存儲(chǔ)器類型:OTP EEPROM 大小:- RAM 容量:256 x 8 電壓 - 電源 (Vcc/Vdd):4.5 V ~ 5.5 V 數(shù)據(jù)轉(zhuǎn)換器:- 振蕩器型:內(nèi)部 工作溫度:0°C ~ 70°C 封裝/外殼:40-DIP（0.600"，15.24mm） 包裝:管件 |
| T89C51CC02UA-TISIM | 功能描述:IC 8051 MCU FLASH 16K 28SOIC RoHS:否 類別:集成電路 (IC) >> 嵌入式 - 微控制器， 系列:AT89C CAN 標(biāo)準(zhǔn)包裝:9 系列:87C 核心處理器:8051 芯體尺寸:8-位 速度:40/20MHz 連通性:UART/USART 外圍設(shè)備:POR，WDT 輸入/輸出數(shù):32 程序存儲(chǔ)器容量:32KB（32K x 8） 程序存儲(chǔ)器類型:OTP EEPROM 大小:- RAM 容量:256 x 8 電壓 - 電源 (Vcc/Vdd):4.5 V ~ 5.5 V 數(shù)據(jù)轉(zhuǎn)換器:- 振蕩器型:內(nèi)部 工作溫度:0°C ~ 70°C 封裝/外殼:40-DIP（0.600"，15.24mm） 包裝:管件 |
| T89C51IC | 制造商:ATMEL 制造商全稱:ATMEL Corporation 功能描述:8-bit Microcontroller with Flash and I2C Interface |
| T89C51IC2 | 制造商:ATMEL 制造商全稱:ATMEL Corporation 功能描述:8-bit Microcontroller with Flash and I2C Interface |
| T89C51IC2-RLTIL | 制造商:ATMEL 制造商全稱:ATMEL Corporation 功能描述:8-bit Microcontroller with Flash and I2C Interface |
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