參數(shù)資料
型號: T89C51CC02UA-SITIM
廠商: Atmel
文件頁數(shù): 89/159頁
文件大?。?/td> 0K
描述: IC 8051 MCU FLASH 16K 28PLCC
標(biāo)準(zhǔn)包裝: 37
系列: AT89C CAN
核心處理器: 8051
芯體尺寸: 8-位
速度: 40MHz
連通性: CAN,UART/USART
外圍設(shè)備: POR,PWM,WDT
輸入/輸出數(shù): 20
程序存儲器容量: 16KB(16K x 8)
程序存儲器類型: 閃存
EEPROM 大?。?/td> 2K x 8
RAM 容量: 512 x 8
電壓 - 電源 (Vcc/Vdd): 3 V ~ 5.5 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 8x10b
振蕩器型: 外部
工作溫度: -40°C ~ 85°C
封裝/外殼: 28-PLCC
包裝: 管件
配用: AT89STK-06-ND - KIT DEMOBOARD 8051 MCU W/CAN
其它名稱: T89C51CC02UASITIM
35
AT/T89C51CC02
4126L–CAN–01/08
FM0 Memory Architecture
The Flash memory is made up of 4 blocks (See Figure 13):
1.
The memory array (user space) 16K Bytes
2.
The Extra Row
3.
The Hardware security bits
4.
The column latch registers
User Space
This space is composed of a 16K Bytes Flash memory organized in 128 pages of 128
Bytes. It contains the user’s application code.
Extra Row (XRow)
This row is a part of FM0 and has a size of 128 Bytes. The extra row may contain infor-
mation for boot loader usage.
Hardware Security Byte
The Hardware security Byte space is a part of FM0 and has a size of 1 byte.
The 4 MSB can be read/written by software, the 4 LSB can only be read by software and
written by hardware in parallel mode.
Column Latches
The column latches, also part of FM0, have a size of full page (128 Bytes).
The column latches are the entrance buffers of the three previous memory locations
(user array, XROW and Hardware security byte).
Cross Flash Memory Access
Description
The FM0 memory can be programmed as describe on Table 21. Programming FM0
from FM0 is impossible.
The FM1 memory can be program only by parallel programming.
Table 21 show all software Flash access allowed.
Table 21. Cross Flash Memory Access
C
o
d
e
execu
ti
n
g
fro
m
Action
FM0
(user Flash)
FM1
(boot Flash)
FM0
(user Flash)
Read
ok
-
Load column latch
ok
-
Write
-
FM1
(boot Flash)
Read
ok
Load column latch
ok
-
Write
ok
-
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