參數(shù)資料
型號(hào)： T90FJR
廠商： ATMEL CORP
元件分類： 消費(fèi)家電
英文描述： Dual Common Interface Hardware Controller- CIMax
中文描述： SPECIALTY CONSUMER CIRCUIT, PQFP128
封裝： PLASTIC, QFP-128
文件頁(yè)數(shù)： 13/41頁(yè)
文件大?。?/td> 617K
代理商： T90FJR
13
T90FJR
Rev. A
–
7-Sep-01
Write access
Note:
(1): The WAIT / ACK output is either WAIT or ACK formatted according to the WAIT /
ACK pin settings (active level, driving structure).
(2): Depending on the write access type, CE can be either CE1A# or CE1B# for access
to memory or IO to module A or B, CE2A# or CE2B# for access in EC (Extended Chan-
nel) mode or even EXTCS for access to external device in regenerate mode
(3): REG# signal is not asserted during a common memory or external access.
(4): WE# signal is asserted during a memory access (attribute or common). It is replaced
by IOWR# during an IO write cycle, an EC (Extended Channel) write cycle (using CE2A#
or CE2B#) or an external access in regenerate mode.
(5): t4 can be lengthened by the insertion of wait cycles. When the destination module
asserts WAIT# signal, the t4 cycles counter stops until WAIT# becomes inactive anew.
Memory write is valid for both attribute and common memory access. Timings are given
in CIMaX
clock cycles. They are calculated to comply with PCMCIA specifications
when 27MHz clock is used.
t1
t5
WR
’
WAIT
(1)
ACK
(1)
CE
(2)
REG#
(3)
WE#
(4)
t4
(5)
t2
t6
DATOE#
t7
t3
t0
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