參數(shù)資料
型號(hào): TAS5508PAGRG4
廠商: TEXAS INSTRUMENTS INC
元件分類: 消費(fèi)家電
英文描述: SPECIALTY CONSUMER CIRCUIT, PQFP64
封裝: GREEN, PLASTIC, TQFP-64
文件頁數(shù): 75/105頁
文件大?。?/td> 1286K
代理商: TAS5508PAGRG4
TAS5508
8-Channel Digital Audio PWM Processor
www.ti.com
SLES091D – FEBRUARY 2004 – REVISED JULY 2009
TOTAL
I2C
REGISTER FIELDS
DESCRIPTION OF CONTENTS
DEFAULT STATE
BYTES
SUBADDRESS
Ch8 DRC2 slope k0
DRC2 slope (k0)
0x00, 0x40, 0x00, 0x00
0x9F
12
Ch8 DRC2 slope k1
DRC2 slope (k1)
0x0F, 0xC0, 0x00, 0x00
Ch8 DRC2 slope k2
DRC2 slope (k2)
0x0F, 0x90, 0x00, 0x00
DRC2 offset (O1) – upper 2 bytes
0x00, 0x00, 0xFF, 0xFF
Ch8 DRC2 offset 1
DRC2 offset (O1) – lower 4 bytes
0xFF, 0x82, 0x30, 0x98
0xA0
16
DRC2 offset (O2) – upper 2 bytes
0x00, 0x00, 0x00, 0x00
Ch8 DRC2 offset 2
DRC2 offset (O2) – lower 4 bytes
0x01, 0x95, 0xB2, 0xC0
Ch8 DRC2 attack
DRC 2 attack
0x00, 0x00, 0x88, 0x3F
Ch8 DRC2 (1 – attack)
DRC2 (1 – attack)
0x00, 0x7F, 0x77, 0xC0
0xA1
16
Ch8 DRC2 decay
DRC2 decay
0x00, 0x00, 0x00, 0xAE
Ch8 DRC2 (1 – decay)
DRC2 (1 – decay)
0x00, 0x7F, 0xFF, 0x51
DRC bypass 1
Ch1 DRC1 bypass coefficient
1.0
0xA2
8
DRC inline 1
Ch1 DRC1 inline coefficient
0.0
DRC bypass 2
Ch2 DRC1 bypass coefficient
1.0
0xA3
8
DRC inline 2
Ch2 DRC1 inline coefficient
0.0
DRC bypass 3
Ch3 DRC1 bypass coefficient
1.0
0xA4
8
DRC inline 3
Ch3 DRC1 inline coefficient
0.0
DRC bypass 4
Ch4 DRC1 bypass coefficient
1.0
0xA5
8
DRC inline 4
Ch4 DRC1 inline coefficient
0.0
DRC bypass 5
Ch5 DRC1 bypass coefficient
1.0
0xA6
8
DRC inline 5
Ch5 DRC1 inline coefficient
0.0
DRC bypass 6
Ch6 DRC1 bypass coefficient
1.0
0xA7
8
DRC inline 6
Ch6 DRC1 inline coefficient
0.0
DRC bypass 7
Ch7 DRC1 bypass coefficient
1.0
0xA8
8
DRC inline 7
Ch7 DRC1 inline coefficient
0.0
DRC bypass 8
Ch8 DRC2 bypass coefficient
1.0
0xA9
8
DRC inline 8
Ch8 DRC2 inline coefficient
0.0
0xAA
8
sel op1–8 and mix to PWM1
Select 0 to 2 of eight channels to
Mix channels to PWM1
output mixer 1
0xAB
8
sel op1–8 and mix to PWM2
Select 0 to 2 of eight channels to
Mix channels to PWM2
output mixer 2
0xAC
8
sel op1–8 and mix to PWM3
Select 0 to 2 of eight channels to
Mix channels to PWM3
output mixer 3
0xAD
8
sel op1–8 and mix to PWM4
Select 0 to 2 of eight channels to
Mix channels to PWM4
output mixer 4
0xAE
8
sel op1–8 and mix to PWM5
Select 0 to 2 of eight channels to
Mix channels to PWM5
output mixer 5
0xAF
8
sel op1–8 and mix to PWM6
Select 0 to 2 of eight channels to
Mix channels to PWM6
output mixer 6
0xB0
12
sel op1–8 and mix to PWM7
Select 0 to 3 of eight channels to
Mix channels to PWM7
output mixer 7
0xB1
12
sel op1–8 and mix to PWM8
Select 0 to 3 of eight channels to
Mix channels to PWM8
output mixer 8
0xB2–0xCE
Reserved
0xCF
20
Volume biquad
All pass
0xD0
4
Volume, treble, and bass
u [31:24], u [23:16], u [15:12]
0x00, 0x00, 0x02, 0x3F
slew rates register
VSR[11:8], TBSR[7:0]
0xD1
4
Ch1 volume
0 dB
0xD2
4
Ch2 volume
0 dB
0xD3
4
Ch3 volume
0 dB
0xD4
4
Ch4 volume
0 dB
0xD5
4
Ch5 volume
0 dB
0xD6
4
Ch6 volume
0 dB
0xD7
4
Ch7 volume
0 dB
0xD8
4
Ch8 volume
0 dB
71
Serial-Control I2C Register Summary
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