參數(shù)資料
型號(hào): TDA1517A
廠商: NXP Semiconductors N.V.
英文描述: 8 W BTL or 2 x 4 W SE power amplifier
中文描述: 8糯橋接或2 × 4瓦東南功率放大器
文件頁數(shù): 8/20頁
文件大小: 132K
代理商: TDA1517A
2001 Apr 17
8
Philips Semiconductors
Product specification
8 W BTL or 2
×
4 W SE power amplifier
TDA1517ATW
handbook, full pagewidth
MGU305
15
4
10
11
16
8
+
OUT
OUT
PGND
SGND
9
100
nF
1000
μ
F
RL
4
VCC
TDA1517ATW
15 k
10 k
8.2
k
15 k
100
μ
F
1000
μ
F
RL
4
1000
μ
F
12
13
IN1
+
3
18
17
MODE
5
220 nF
A
Ri
60 k
IN2
220 nF
B
VCC
VCC
STANDBY/
MUTE LOGIC
MICRO-
CONTROLLER
μ
c1
μ
c2
μ
c1
0
0
1
On
Mute
Standby
μ
c2
0
1
0
SHORT CIRCUIT
AND
TEMPERATURE
PROTECTION
input
reference
voltage
Ri
60 k
Fig.4 SE application block diagram.
Test conditions
T
amb
= 25
°
C; unless otherwise specified: V
P
= 12 V, BTL
application, f = 1 kHz, R
L
= 8
, fixed gain = 26 dB, audio
band-pass: 22 Hz to 22 kHz. In the figures as a function of
frequency a band-pass of 10 Hz to 80 kHz was applied.
The BTL application block diagram is shown in Fig.3. The
PCB layout [which accommodates both the mono (BTL)
and stereo (single-ended) application] is shown in Fig.6.
Printed-Circuit Board (PCB) layout and grounding
For high system performance levels certain grounding
techniques are imperative. The input reference grounds
have to be tied to their respective source grounds and
must have separate traces from the power ground traces;
this will separate the large (output) signal currents from
interfering with the small AC input signals. The small
signal ground traces should be located physically as far as
possible from the power ground traces. Supply and output
traces should be as wide as possible for delivering
maximum output power.
Proper supply bypassing is critical for low noise
performance and high power supply rejection. The
respective capacitor locations should be as close as
possible to the device and grounded to the power ground.
Decoupling the power supply also prevents unwanted
oscillations. For suppressing higher frequency transients
(spikes) on the supply line a capacitor with low ESR
(typical0.1
μ
F)hastobeplacedascloseaspossibletothe
device. For suppressing lower frequency noise and ripple
signals, a large electrolytic capacitor (e.g. 1000
μ
F or
greater) must be placed close to the IC.
In single-ended (stereo) application a bypass capacitor
connected to pin SVR reduces the noise and ripple on the
midrail voltage. For good THD and noise performance a
low ESR capacitor is recommended.
Input configuration
It should be noted that the DC level of the input pins is
approximately 2.1 V; a coupling capacitor is therefore
necessary.
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