
1996 Nov 19
11
Philips Semiconductors
Product specification
Multi-mode QAM demodulator
TDA8046
7.1.2
E
QUALIZER
This function is realized with a T spaced 12 or 14 taps
(selected via the I
2
C-bus) adaptive filter with a feedback
part. The equaliser is based on a Decision Feedback
Equalizer (DFE) structure with Least Mean Square (LMS)
coefficient updating algorithm. No training sequence is
required. The block schematic of the total equalizer is
shown in Fig.8. The main tap of the equalizer is adjustable
for fine AGC function (6 dB AGC range). The settings of
the equalizer taps can be read via the I
2
C-bus. If the
equalizer diverges, an alarm bit is set (I
2
C-bus bit ALEQ)
and an automatic reset of the taps can be performed
(I
2
C-bus bit EAR).
To improve acquisition time, the convergence steps of the
FFE/DFE parts of the equalizer are programmable via the
I
2
C-bus. When the system locks, the steps are
automatically modified for optimum performances.
Besides reading the equalizer tap values, the main tap of
the equalizer can also be programmed. After setting the
main tap, the other coefficients can be set to zero.
The equalizer settings can also be frozen via the I
2
C-bus.
The equalizer has been proven to work correctly under bad
channel conditions as indicated in Table 1. It is guaranteed
that all loops (including equalizer) converge at a SNR of
21 dB for a 64-QAM modulation format and 27 dB for a
256-QAM modulation format.
Table 1
Channel echo profile
Figure 7 represents the QAM spectrum seen by the
equalizer. It corresponds (in the frequency domain) to the
multiplication of a full nyquist spectrum by the impulse
response of the channel specified in Table 1.
DELAY
AMPLITUDE
PHASE
130
°
60
°
310
°
200
°
200
°
3
8
×
T
sym
1
1
8
×
T
sym
2
×
T
sym
4
5
8
×
T
sym
6
7
8
×
T
sym
0.08
0.20
0.05
0.10
0.03
Fig.7 QAM spectrum with echo profile as seen by the equalizer.
handbook, full pagewidth
gain
(dB)
1
11
0.5
0.5
relative frequency
0.375
0.375
0.125
0.125
0.25
0.25
0
3
5
9
7
MGD636
(
f
)
rs