參數(shù)資料
型號(hào): TDA8540T
廠商: NXP SEMICONDUCTORS
元件分類(lèi): 運(yùn)動(dòng)控制電子
英文描述: 4 X 4 video switch matrix
中文描述: 4-CHANNEL, AUDIO/VIDEO SWITCH, PDSO20
文件頁(yè)數(shù): 6/20頁(yè)
文件大小: 131K
代理商: TDA8540T
1995 Feb 06
6
Philips Semiconductors
Product specification
4
×
4 video switch matrix
TDA8540
Table 4
The second byte: SUB
Options for SUB:
If SUB = 00H: access to switch control (SW1)
If SUB = 01H: access to gain/clamp/data control (GCO)
If SUB = 02H: access to output enable control (OEN).
Remarks:
If more than one data byte is sent, the SUB byte will be automatically incremented.
If more than 3 data bytes are sent, the internal counter will roll over and the device will then rewrite the first register.
Data Bytes
SWI (SUB = 00H): selects which input is connected to the different outputs, as shown in Table 5.
Table 5
SWI (SUB = 00H) selection of inputs connected to outputs
Table 6
Selection of inputs
Note
1.
For j = 0 to 3.
Example: if S21 = 0 and S20 = 1, then OUT2 is connected to IN1.
GCO (SUB = 01H):
Selects the gain of each output.
Selects the clamp action or mean value on inputs 0 and 1.
Determines the value of the auxiliary outputs D1 and D0.
Table 7
GCO byte
Notes
1.
2.
3.
For j = 0 to 3: if Gj = 0 (1), then output j has a gain of 2 (1).
If CL0 (CL1) = 0, then input signal on IN0 (IN1) is clamped.
For j = 0 or 1: if Dj = 0 (1), then logical output j is LOW (HIGH).
7 MSB
6
5
4
3
2
1
0 LSB
0
0
0
0
0
0
RS1
RS0
7 MSB
6
5
4
3
2
1
0 LSB
S31
S30
S21
S20
S11
S10
S01
S00
OUTPUT
Sj1 AND Sj0
(1)
00
01
10
11
OUTj
IN0
IN1
IN2
IN3
7 MSB
G3
(1)
6
5
4
3
2
1
0 LSB
D0
(3)
G2
(1)
G1
(1)
G0
(1)
CL1
(2)
CL0
(2)
D1
(3)
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