參數(shù)資料
型號(hào)： TDA8540T
廠商： NXP SEMICONDUCTORS
元件分類(lèi)： 運(yùn)動(dòng)控制電子
英文描述： 4 X 4 video switch matrix
中文描述： 4-CHANNEL, AUDIO/VIDEO SWITCH, PDSO20
文件頁(yè)數(shù)： 7/20頁(yè)
文件大小： 131K
代理商： TDA8540T
1995 Feb 06
7
Philips Semiconductors
Product specification
4
×
4 video switch matrix
TDA8540
OEN (SUB = 02H): selects, for each output, if the output is active or high impedance, see Table 8.
Table 8
OEN (SUB = 02H) determines which output is active or high impedance
Notes
1.
2.
X = don’t care.
For j = 0 to 3: if ENj = 0 (1), then OUT j is high impedance (active).
After a power-on reset:
The outputs are set to a high impedance state; the outputs are connected to IN0; the gains are set at two and inputs
IN0 and IN1 are clamped.
Programming of the device is necessary because the outputs are in high impedance state.
Non-I
2
C-bus control
If the S0, S1 and S2 pins are all connected to V
CC
the device will enter the non-I
2
C-bus mode.
After a power-on reset:
Gain is set at two for all outputs.
All inputs are clamped.
All outputs are active.
The matrix position is given by the SDA and SCL voltage level.
Table 9
Non-I
2
C-bus control
SCL and SDA act as normal input pins:
SCL interchanges (OUT3 and OUT2) with (OUT1 and OUT0).
SDA interchanges OUT3 with OUT2 and OUT1 with OUT0.
Remark:
For use with chrominance signals, the clamp action must be overruled by external bias.
7 MSB
X
(1)
6
5
4
3
2
1
0 LSB
EN0
(2)
X
(1)
X
(1)
X
(1)
EN3
(2)
EN2
(2)
EN1
(2)
OUTPUT
SCL AND SDA
00
01
10
11
OUT3
OUT2
OUT1
OUT0
IN3
IN2
IN1
IN0
IN2
IN3
IN0
IN1
IN1
IN0
IN3
IN2
IN0
IN1
IN2
IN3
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