參數(shù)資料
型號: TDA9874APS
廠商: NXP SEMICONDUCTORS
元件分類: 接收器
英文描述: Digital TV sound demodulator/decoder
中文描述: AM/FM, AUDIO DEMODULATOR, PDIP42
封裝: 0.600 INCH, SHRINK, PLASTIC, MS-020, SOT-270-1, DIP-42
文件頁數(shù): 46/68頁
文件大?。?/td> 231K
代理商: TDA9874APS
1999 Dec 03
46
Philips Semiconductors
Preliminary specification
Digital TV sound demodulator/decoder
TDA9874A
10.3.20 I
2
S-
BUS
O
UTPUT
S
ELECT
R
EGISTER
(I
2
SOSR)
This register is used to define both the signal source to be output at the I
2
S-bus port and the mode of the digital matrix
for signal selection.
The two combinations of FM and NICAM shown in Table 62 apply to the (rare) condition that three different languages
are being broadcast in an FM + NICAM system. They allow for a two-out-of-three selection for special applications.
It should be noted that the controlling microprocessor has to assure that the FM dematrix is set to the mono position or
IDSWFM is set HIGH. If the I
2
S-bus signal source is set to FM left or FM right it is influenced by the automatic FM
dematrix switching (see subaddress 11).
The default setting after power-on reset is ‘0000 0000’.
Table 60
I
2
S-bus output select register (subaddress 22)
Table 61
Description of the I
2
SOSR bits
7
6
5
4
3
2
1
0
TVSMIIS
ICSM2
ICSM1
ICSM0
0
0
ISS1
ISS0
BIT
SYMBOL
DESCRIPTION
7
TVSMIIS
Auto-select function:
for TV applications, only in combination with IDSWFM set HIGH.
If set HIGH switches the matrix automatically depending on the IDSTE, IDDUA bits for
FM and the S/MB, D/SB bits for NICAM in transmitters subaddresses 0 and 1
(see Sections 10.4.1 and 10.4.2).
Output channel selection mode:
these 3 bits select the output channel selection
mode; see Table 62
6
5
4
3
2
1
0
ICSM2
ICSM1
ICSM0
ISS1
ISS0
these 2 bits are not used and should be set to logic 0
Signal source:
these 2 bits select the signal source; see Table 62
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