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參數(shù)資料
| 型號： | TLC32040MFK |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | ANALOG INTERFACE CIRCUIT |
| 中文描述： | 模擬接口電路 |
| 文件頁數(shù)： | 5/30頁 |
| 文件大小： | 202K |
| 代理商： | TLC32040MFK |
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TLC32040M
ANALOG INTERFACE CIRCUIT
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
4–5
INTERNAL TIMING CONFIGURATION
Divide by 4
Shift Clock
1.296 MHz (1)
2.592 MHz (2)
Master Clock
5.184 MHZ (1)
10.368 MHZ (2)
20.736 MHz (1)
41.472 MHz (2)
XTAL
Osc
TMS320
DSP
Optional External Circuitry
for Full-Duplex Modems
153.6 kHz
Clock (1)
Divide
by 135
Commercial
External
Front-End
Full-Duplex
Split-Band
Filters
Divide by 2
TB Register
(6 Bits)
Low-Pass
Switched
Cap Filter
CLK = 288 kHz
Square Wave
D/A
Conversion
Frequency
Divide by 2
Band-Pass
Switched
Cap Filter
CLK = 288 kHz
Square Wave
RX Counter B
RB = 40, 7.2 kHz
RB = 36, 8.0 kHz
RB = 30, 9.6 kHz
RB = 20, 14.4 kHz
RB = 15, 19.2 kHz
TX Counter B
TB = 40, 7.2 kHz
TB = 36, 8.0 kHz
TB = 30, 9.6 kHz
TB = 20, 14.4 kHz
TB = 15, 19.2 kHz
576-kHz
Pulses
TX Counter A
[TA =
[TA =
(6 Bits)
9 (1)]
18 (2)]
TA’ Register
(6 Bits)
(2s Compl)
TA Register
(5 Bits)
Adder/
Subtractor
(6 Bits)
d0, d1 = 0,1
d0, d1 = 1,0
d0, d1 = 0,0
d0, d1 =
1,1
d0, d1 = 0,1
d0, d1 = 1,0
d0, d1 = 0,0
d0, d1 = 1, 1
SCF Clock Frequency =
Master Clock Frequency
2
×
Contents of Counter A
Adder/
Subtractor
(6 Bits)
RA’ Register
(6 Bits)
(2s Compl)
RA Register
(5 Bits)
RB Register
(6 Bits)
RX Counter A
[TA =
[TA =
(6 Bits)
9 (1)]
18 (2)]
576-kHz
Pulses
A/D
Conversion
Frequency
Split-band filtering can alternatively be performed after the analog input function via software in the SMJ320.
These control bits are described in the AIC DX data word format section.
NOTE: Frequency 1, 20.736 MHz is used to show how 153.6 kHz (for a commercially available modem split-band filter clock), popular speech
and modem sampling signal frequencies, and an internal 288-kHz switched-capacitor filter clock can be derived synchronously and as
submultiples of the crystal oscillator frequency. Since these derived frequencies are synchronous submultiples of the crystal frequency,
aliasing does not occur as the sampled analog signal passes between the analog converter and switched-capacitor filter stages.
Frequency 2, 41.472 MHz is used to show that the AIC can work with high-frequency signals, which are used by high-speed digital signal
processors
.
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