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參數(shù)資料
| 型號： | TLV320AIC10IGQER |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | 消費家電 |
| 英文描述： | SPECIALTY CONSUMER CIRCUIT, PBGA80 |
| 封裝： | MICRO, PLASTIC, BGA-80 |
| 文件頁數(shù)： | 32/57頁 |
| 文件大小： | 454K |
| 代理商： | TLV320AIC10IGQER |
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4–4
4.3.6.3 DAC Signal-to-Distortion + Noise When Load is 600
(see Note 5)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
VI = 0 dB
70
77
THD+N
Signal to total harmonic distortion + noise
VI = –3 dB
73
78
dB
THD+N
Signal-to-total harmonic distortion + noise
VI = –9 dB
70
78
dB
VI = –40 dB
35
42
NOTE 5: The test condition is the digital equivalent of a 1020-Hz input signal with an 8-kHz conversion rate. The test is measured at output of
application schematic low-pass filter. The test is conducted in 16-bit mode.
4.3.7
DAC Channel Characteristics
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
Dynamic range
VI = 0 dB at 1020 Hz
82
dB
Interchannel isolation
100
dB
EG
Gain error, 0 dB
VO = 0 dB at 1020 Hz
0.5
dB
Idle channel narrow band noise
0 kHz to 4 kHz, See Note 6
25
70
Vrms
VOO
Output offset voltage at OUT (differential)
DIN = all zeros
30
mV
V
Analog output voltage
5 V
Differential with respect to common mode
–4
4
V
VO
Analog output voltage
3.3 V
Differential with res ect to common mode
and full-scale digital input
–2.5
2.5
V
Channel delay
18/fs
NOTE 6: The conversion rate is 8 kHz.
4.3.8
Op-Amp Interface (A1, A3, A4)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
AV
Gain
100
Input voltage range
0.5
AVDD – 0.5
V
Input offset voltage
10
mV
Input offset current
0
mA
Output power
15
mW
SNR
Signal-to-noise ratio
Input frequency = 1020 Hz
90
dB
THD + N
Signal-to-total harmonic distortion + noise
Input frequency = 1020 Hz
90
dB
Unity-gain bandwidth
Open loop
10
MHz
Noise output voltage
30
Vrms
4.3.9
Power-Supply Rejection (see Note 7)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
AVDD
Supply-voltage rejection ratio, analog supply
fj = 0 to fs/2
75
dB
DVDD
Supply voltage rejection ratio
DAC channel
fj =0to30kHz
95
dB
DVDD
Supply-voltage rejection ratio
ADC channel
fj = 0 to 30 kHz
86
dB
NOTE 7: Power supply rejection measurements are made with both the ADC and the DAC channels idle and a 200-mV peak-to-peak signal
applied to the appropriate supply.
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