參數(shù)資料
型號(hào): TLV320AIC3110IRHBT
廠商: TEXAS INSTRUMENTS INC
元件分類: 音頻/視頻放大
英文描述: AUDIO AMPLIFIER, PQCC32
封裝: 5 X 5 MM, GREEN, PLASTIC, QFN-32
文件頁(yè)數(shù): 123/126頁(yè)
文件大?。?/td> 1528K
代理商: TLV320AIC3110IRHBT
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SLAS647 – DECEMBER 2009
www.ti.com
Page 0 / Register 78 (0x4E): Beep Cos(x) MSB
READ/
RESET
BIT
DESCRIPTION
WRITE
VALUE
D7–D0
R/W
0111 1110
8 MSBs out of 16 bits for cos(2
π × fin/fS), where fin is the beep frequency and fS is the DAC sample rate.
Page 0 / Register 79 (0x4F): Beep Cos(x) LSB
READ/
RESET
BIT
DESCRIPTION
WRITE
VALUE
D7–D0
R/W
1110 0011
8 LSBs out of 16 bits for cos(2
π × fin/fS), where fin is the beep frequency and fS is the DAC sample rate.
Page 0 / Register 80: Reserved
READ/
RESET
BIT
DESCRIPTION
WRITE
VALUE
D7–D0
R/W
XXXX XXXX
Reserved. Write only the reset value to these bits.
Page 0 / Register 81 (0x51): ADC Digital Mic
READ/
RESET
BIT
DESCRIPTION
WRITE
VALUE
D7
R/W
0
0: ADC channel is powered down.
1: ADC channel is powered up.
D6
R/W
0
Reserved
D5–D4
R/W
00
00: Digital microphone input is obtained from GPIO1 pin.
01: Reserved.
10: Digital microphone input is obtained from DIN pin.
11: Reserved.
D3
R/W
0
0: Digital microphone is not enabled for delta-sigma mono ADC channel.
1: Digital microphone is enabled for delta-sigma mono ADC channel
D2
R/W
0
Reserved
D1–D0
R/W
00
00: ADC channel volume control soft-stepping is enabled for one step per sample period.
01: ADC channel volume control soft-stepping is enabled for one step per two sample periods.
10: ADC channel volume control soft-stepping is disabled.
11: Reserved. Do not write this sequence to these bits.
Page 0 / Register 82 (0x52): ADC Digital Volume Control Fine Adjust
READ/
RESET
BIT
DESCRIPTION
WRITE
VALUE
D7
R/W
1
0: ADC channel not muted
1: ADC channel muted
Delta-Sigma Mono ADC Channel Volume Coontrol Fine Gain
000: 0 dB
001: –0.1 dB
D6–D4
R/W
000
010: –0.2 dB
011: –0.3 dB
100: –0.4 dB
101–111: Reserved
D3–D0
R/W
0000
Reserved. Write only zeros to these bits.
Page 0 / Register 83 (0x53): ADC Digital Volume Control Coarse Adjust
READ/
RESET
BIT
DESCRIPTION
WRITE
VALUE
D7
R/W
0
Reserved
D6–D0
000 0000
Delta-Sigma Mono ADC Channel Volume Control Coarse Gain
000 0000–010 0111: Reserved
010 1000: –12 dB
010 1001: –11.5 dB
...
110 0111: 19.5 dB
110 1000: 20 dB
110 1001–111 1111: Reserved
96
REGISTER MAP
Copyright 2009, Texas Instruments Incorporated
Product Folder Link(s): TLV320AIC3110
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