www.ti.com ............................................................................................................................................. SLAS497C – AUGUST 2006 – REVISED DECEMBER 2008
Page 1 / Register 53:
3-D Attenuation Coefficient MSB Register
BIT
READ/
RESET
DESCRIPTION
WRITE
VALUE
D7-D0
R/W
0x7F
3-D Attenuation Coefficient MSB
The 16-bit integer contained in the MSB and LSB registers for this coefficient are interpreted as a
two’s complement integer, with possible values ranging from –32768 to +32767.
Page 1 / Register 54:
3-D Attenuation Coefficient LSB Register
BIT
READ/
RESET
DESCRIPTION
WRITE
VALUE
D7-D0
R/W
0xFF
3-D Attenuation Coefficient LSB
The 16-bit integer contained in the MSB and LSB registers for this coefficient are interpreted as a
two’s complement integer, with possible values ranging from –32768 to +32767.
Page 1 / Register 55–127:
Reserved Registers
BIT
READ/
RESET
DESCRIPTION
WRITE
VALUE
D7-D0
R
00000000
Reserved. Do not write to these registers.
Copyright 2006–2008, Texas Instruments Incorporated
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