參數(shù)資料
型號(hào): TLV320AIC31IRHBT
廠(chǎng)商: TEXAS INSTRUMENTS INC
元件分類(lèi): 消費(fèi)家電
英文描述: SPECIALTY CONSUMER CIRCUIT, PQCC32
封裝: 5 X 5 MM, GREEN, PLASTIC, QFN-32
文件頁(yè)數(shù): 55/83頁(yè)
文件大小: 1197K
代理商: TLV320AIC31IRHBT
www.ti.com ............................................................................................................................................. SLAS497C – AUGUST 2006 – REVISED DECEMBER 2008
Page 0 / Register 56:
PGA_R to HPLCOM Volume Control Register
BIT
READ/
RESET
DESCRIPTION
WRITE
VALUE
D7
R/W
0
PGA_R Output Routing Control
0: PGA_R is not routed to HPLCOM
1: PGA_R is routed to HPLCOM
D6-D0
R/W
0000000
PGA_R to HPLCOM Analog Volume Control
For 7-bit register setting versus analog gain values, see Table 5.
Page 0 / Register 57:
DAC_R1 to HPLCOM Volume Control Register
BIT
READ/
RESET
DESCRIPTION
WRITE
VALUE
D7
R/W
0
DAC_R1 Output Routing Control
0: DAC_R1 is not routed to HPLCOM
1: DAC_R1 is routed to HPLCOM
D6-D0
R/W
0000000
DAC_R1 to HPLCOM Analog Volume Control
For 7-bit register setting versus analog gain values, see Table 5.
Page 0 / Register 58:
HPLCOM Output Level Control Register
BIT
READ/
RESET
DESCRIPTION
WRITE
VALUE
D7-D4
R/W
0000
HPLCOM Output Level Control
0000: Output level control = 0-dB
0001: Output level control = 1-dB
0010: Output level control = 2-dB
...
1000: Output level control = 8-dB
1001: Output level control = 9-dB
1010–1111: Reserved. Do not write these sequences to these register bits.
D3
R/W
0
HPLCOM Mute
0: HPLCOM is muted
1: HPLCOM is not muted
D2
R/W
1
HPLCOM Power Down Drive Control
0: HPLCOM is weakly driven to a common-mode when powered down
1: HPLCOM is 3-stated when powered down
D1
R
1
HPLCOM Volume Control Status
0: Not all programmed gains to HPLCOM have been applied yet
1: All programmed gains to HPLCOM have been applied
D0
R/W
0
HPLCOM Power Control
0: HPLCOM is not fully powered up
1: HPLCOM is fully powered up
Page 0 / Register 59:
Reserved Register
BIT
READ/
RESET
DESCRIPTION
WRITE
VALUE
D7-D0
R/W
0000000
Reserved. Write only '0000000' to this register.
Page 0 / Register 60:
PGA_L to HPROUT Volume Control Register
BIT
READ/
RESET
DESCRIPTION
WRITE
VALUE
D7
R/W
0
PGA_L Output Routing Control
0: PGA_L is not routed to HPROUT
1: PGA_L is routed to HPROUT
D6-D0
R/W
0000000
PGA_L to HPROUT Analog Volume Control
For 7-bit register setting versus analog gain values, see Table 5.
Copyright 2006–2008, Texas Instruments Incorporated
59
Product Folder Link(s): TLV320AIC31
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