參數(shù)資料
型號: TLV320AIC32IRHB
廠商: TEXAS INSTRUMENTS INC
元件分類: 消費家電
英文描述: SPECIALTY CONSUMER CIRCUIT, PQCC32
封裝: 5 X 5 MM, PLASTIC, QFN-32
文件頁數(shù): 28/76頁
文件大?。?/td> 1124K
代理商: TLV320AIC32IRHB
www.ti.com
Volume Level 0dBto
+9dB,mute
VolumeLevel0dBto
+9dB,mute
VCM
Volume Level 0dBto
+9dB,mute
VolumeLevel0dB
to+9dB,mute
VCM
HPLOUT
HPLCOM
HPROUT
HPRCOM
DAC_L2
LINE2LP
LINE2RP
PGA_L
DAC_L1
DAC_R1
VOLUME
CONTROLS,
MIXING
PGA_R
DAC_R2
LINE2LM
LINE2RM
PGA_L
DAC_L1
DAC_R1
VOLUME
CONTROLS,
MIXING
PGA_R
LINE2RP
PGA_L
DAC_L1
DAC_R1
VOLUME
CONTROLS,
MIXING
PGA_R
LINE2LM
LINE2RM
PGA_L
DAC_L1
DAC_R1
VOLUME
CONTROLS,
MIXING
PGA_R
LINE2LM
SLAS479B – AUGUST 2005 – REVISED AUGUST 2006
Figure 31. Architecture of the output stage leading to the high power output drivers
The high power output drivers include additional circuitry to avoid artifacts on the audio output during power-on
and power-off transient conditions. The user should first program the type of output configuration being used in
Page-0/Reg-14, to allow the device to select the optimal power-up scheme to avoid output artifacts. The
power-up delay time for the high power output drivers is also programmable over a wide range of time delays,
from instantaneous up to 4-sec, using Page-0/Reg-42.
When these output drivers are powered down, they can be placed into a variety of output conditions based on
register programming. If lowest power operation is desired, then the outputs can be placed into a tri-state
condition, and all power to the output stage is removed. However, this generally results in the output nodes
drifting to rest near the upper or lower analog supply, due to small leakage currents at the pins. This then results
in a longer delay requirement to avoid output artifacts during driver power-on. In order to reduce this required
34
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