- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄373674 > TMP86PM46NG (Toshiba Corporation) Zener Diode; Application: General; Pd (mW): 500; Vz (V): 5.4 to 5.7; Condition Iz at Vz (mA): 5; C (pF) max: -; Condition VR at C (V):   ESD (kV) min: -; Package: DO-35 PDF資料下載
參數(shù)資料
| 型號： | TMP86PM46NG |
| 廠商： | Toshiba Corporation |
| 英文描述： | Zener Diode; Application: General; Pd (mW): 500; Vz (V): 5.4 to 5.7; Condition Iz at Vz (mA): 5; C (pF) max: -; Condition VR at C (V):   ESD (kV) min: -; Package: DO-35 |
| 中文描述： | 8位微控制器 |
| 文件頁數(shù)： | 101/170頁 |
| 文件大?。?/td> | 1430K |
| 代理商： | TMP86PM46NG |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁第80頁第81頁第82頁第83頁第84頁第85頁第86頁第87頁第88頁第89頁第90頁第91頁第92頁第93頁第94頁第95頁第96頁第97頁第98頁第99頁第100頁當(dāng)前第101頁第102頁第103頁第104頁第105頁第106頁第107頁第108頁第109頁第110頁第111頁第112頁第113頁第114頁第115頁第116頁第117頁第118頁第119頁第120頁第121頁第122頁第123頁第124頁第125頁第126頁第127頁第128頁第129頁第130頁第131頁第132頁第133頁第134頁第135頁第136頁第137頁第138頁第139頁第140頁第141頁第142頁第143頁第144頁第145頁第146頁第147頁第148頁第149頁第150頁第151頁第152頁第153頁第154頁第155頁第156頁第157頁第158頁第159頁第160頁第161頁第162頁第163頁第164頁第165頁第166頁第167頁第168頁第169頁第170頁
Page 91
TMP86PM46NG
9.3.4
8-Bit Pulse Width Modulation (PWM) Output Mode (TC3, 4)
This mode is used to generate a pulse-width modulated (PWM) signals with up to 8 bits of resolution. The
up-counter counts up using the internal clock.
When a match between the up-counter and the PWREGj value is detected, the logic level output from the
timer F/Fj is switched to the opposite state. The counter continues counting. The logic level output from the
timer F/Fj is switched to the opposite state again by the up-counter overflow, and the counter is cleared. The
INTTCj interrupt request is generated at this time.
Since the initial value can be set to the timer F/Fj by TCjCR<TFFj>, positive and negative pulses can be gen-
erated. Upon reset, the timer F/Fj is cleared to 0.
(The logic level output from the
PWMj
pin is the opposite to the timer F/Fj logic level.)
Since PWREGj in the PWM mode is serially connected to the shift register, the value set to PWREGj can be
changed while the timer is running. The value set to PWREGj during a run of the timer is shifted by the
INTTCj interrupt request and loaded into PWREGj. While the timer is stopped, the value is shifted immedi-
ately after the programming of PWREGj. If executing the read instruction to PWREGj during PWM output,
the value in the shift register is read, but not the value set in PWREGj. Therefore, after writing to PWREGj, the
reading data of PWREGj is previous value until INTTCj is generated.
For the pin used for PWM output, the output latch of the I/O port must be set to 1.
Note 1: In the PWM mode, program the timer register PWREGj immediately after the INTTCj interrupt request is
generated (normally in the INTTCj interrupt service routine.) If the programming of PWREGj and the inter-
rupt request occur at the same time, an unstable value is shifted, that may result in generation of the pulse
different from the programmed value until the next INTTCj interrupt request is generated.
Note 2: When the timer is stopped during PWM output, the
PWMj
pin holds the output status when the timer is
stopped. To change the output status, program TCjCR<TFFj> after the timer is stopped. Do not change the
TCjCR<TFFj> upon stopping of the timer.
Example: Fixing the
PWMj
pin to the high level when the TimerCounter is stopped
CLR (TCjCR).3: Stops the timer.
CLR (TCjCR).7: Sets the
PWMj
pin to the high level.
Note 3: To enter the STOP mode during PWM output, stop the timer and then enter the STOP mode. If the STOP
mode is entered without stopping the timer when fc, fc/2 or fs is selected as the source clock, a pulse is out-
put from the
PWMj
pin during the warm-up period time after exiting the STOP mode.
Note 4: j = 3, 4
Table 9-5 PWM Output Mode
Source Clock
Resolution
Repeated Cycle
NORMAL1/2, IDLE1/2 mode
SLOW1/2,
SLEEP1/2
mode
fc = 16 MHz
fs = 32.768 kHz
fc = 16 MHz
fs = 32.768 kHz
DV7CK = 0
DV7CK = 1
fc/2
11
[Hz]
fs/2
3
[Hz]
fs/2
3
[Hz]
128
μ
s
244.14
μ
s
32.8 ms
62.5 ms
fc/2
7
fc/2
7
–
8
μ
s
–
2.05 ms
–
fc/2
5
fc/2
5
–
2
μ
s
–
512
μ
s
–
fc/2
3
fc/2
3
–
500 ns
–
128
μ
s
–
fs
fs
fs
30.5
μ
s
30.5
μ
s
7.81 ms
7.81 ms
fc/2
fc/2
–
125 ns
–
32
μ
s
–
fc
fc
–
62.5 ns
–
16
μ
s
–
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| TMP86PM47AUG_07 | Zener Diode; Application: General; Pd (mW): 500; Vz (V): 5.6 to 5.9; Condition Iz at Vz (mA): 5; C (pF) max: -; Condition VR at C (V):   ESD (kV) min: -; Package: DO-35 |
| TMP86PM47AUG | CMOS 8-Bit Microcontroller |
| TMP86PM47U | CMOS 8-Bit Microcontroller |
| TMP86PM49FG | Zener Diode; Application: General; Pd (mW): 500; Vz (V): 5.7 to 6.0; Condition Iz at Vz (mA): 5; C (pF) max: -; Condition VR at C (V):   ESD (kV) min: -; Package: DO-35 |
| TMP86PM49NG | Zener Diode; Application: General; Pd (mW): 500; Vz (V): 5.8 to 6.1; Condition Iz at Vz (mA): 5; C (pF) max: -; Condition VR at C (V):   ESD (kV) min: -; Package: DO-35 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| TMP86PM46NG(OA) | 制造商:Toshiba America Electronic Components 功能描述: |
| TMP86PM47AUG | 功能描述:8位微控制器 -MCU 32kB OTP RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT |
| TMP86PM47AUG_07 | 制造商:TOSHIBA 制造商全稱:Toshiba Semiconductor 功能描述:8 Bit Microcontroller |
| TMP86PM47U | 制造商:Toshiba America Electronic Components 功能描述:MCU 8BIT TLCS-870 CISC 16KB EPROM 5V 44PQFP - Bulk |
| TMP86PM49FG | 制造商:TOSHIBA 制造商全稱:Toshiba Semiconductor 功能描述:8 Bit Microcontroller |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。