參數(shù)資料
型號: TMP86PM46NG
廠商: Toshiba Corporation
英文描述: Zener Diode; Application: General; Pd (mW): 500; Vz (V): 5.4 to 5.7; Condition Iz at Vz (mA): 5; C (pF) max: -; Condition VR at C (V):   ESD (kV) min: -; Package: DO-35
中文描述: 8位微控制器
文件頁數(shù): 23/170頁
文件大?。?/td> 1430K
代理商: TMP86PM46NG
Page 13
TMP86PM46NG
Switching back and forth between SLOW1 and SLOW2 modes are performed by
SYSCR2<XEN>. In SLOW1 and SLEEP modes, the input clock to the 1st stage of the divider is
stopped; output from the 1st to 6th stages is also stopped.
(4)
IDLE2 mode
In this mode, the internal oscillation circuit remain active. The CPU and the watchdog timer are
halted; however, on-chip peripherals remain active (Operate using the high-frequency clock and/or
the low-frequency clock). Starting and releasing of IDLE2 mode are the same as for IDLE1 mode,
except that operation returns to NORMAL2 mode.
(5)
SLEEP1 mode
In this mode, the internal oscillation circuit of the low-frequency clock remains active. The CPU,
the watchdog timer, and the internal oscillation circuit of the high-frequency clock are halted; how-
ever, on-chip peripherals remain active (Operate using the low-frequency clock). Starting and releas-
ing of SLEEP mode are the same as for IDLE1 mode, except that operation returns to SLOW1 mode.
In SLOW1 and SLEEP1 modes, the input clock to the 1st stage of the divider is stopped; output from
the 1st to 6th stages is also stopped.
(6)
SLEEP2 mode
The SLEEP2 mode is the idle mode corresponding to the SLOW2 mode. The status under the
SLEEP2 mode is same as that under the SLEEP1 mode, except for the oscillation circuit of the high-
frequency clock.
(7)
SLEEP0 mode
In this mode, all the circuit, except oscillator and the timer-base-timer, stops operation. This mode
is enabled by setting “1” on bit SYSCR2<TGHALT>.
When SLEEP0 mode starts, the CPU stops and the timing generator stops feeding the clock to the
peripheral circuits other than TBT. Then, upon detecting the falling edge of the source clock selected
with TBTCR<TBTCK>, the timing generator starts feeding the clock to all peripheral circuits.
When returned from SLEEP0 mode, the CPU restarts operating, entering SLOW1 mode back
again. SLEEP0 mode is entered and returned regardless of how TBTCR<TBTEN> is set. When IMF
= “1”, EF6 (TBT interrupt individual enable flag) = “1”, and TBTCR<TBTEN> = “1”, interrupt pro-
cessing is performed. When SLEEP0 mode is entered while TBTCR<TBTEN> = “1”, the INTTBT
interrupt latch is set after returning to SLOW1 mode.
2.2.3.3
STOP mode
In this mode, the internal oscillation circuit is turned off, causing all system operations to be halted. The
internal status immediately prior to the halt is held with a lowest power consumption during STOP mode.
STOP mode is started by the system control register 1 (SYSCR1), and STOP mode is released by a
inputting (Either level-sensitive or edge-sensitive can be programmably selected) to the
STOP
pin. After
the warm-up period is completed, the execution resumes with the instruction which follows the STOP
mode start instruction.
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TMP86PM47AUG_07 Zener Diode; Application: General; Pd (mW): 500; Vz (V): 5.6 to 5.9; Condition Iz at Vz (mA): 5; C (pF) max: -; Condition VR at C (V): &#160; ESD (kV) min: -; Package: DO-35
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TMP86PM49NG Zener Diode; Application: General; Pd (mW): 500; Vz (V): 5.8 to 6.1; Condition Iz at Vz (mA): 5; C (pF) max: -; Condition VR at C (V): &#160; ESD (kV) min: -; Package: DO-35
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
TMP86PM46NG(OA) 制造商:Toshiba America Electronic Components 功能描述:
TMP86PM47AUG 功能描述:8位微控制器 -MCU 32kB OTP RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風格:SMD/SMT
TMP86PM47AUG_07 制造商:TOSHIBA 制造商全稱:Toshiba Semiconductor 功能描述:8 Bit Microcontroller
TMP86PM47U 制造商:Toshiba America Electronic Components 功能描述:MCU 8BIT TLCS-870 CISC 16KB EPROM 5V 44PQFP - Bulk
TMP86PM49FG 制造商:TOSHIBA 制造商全稱:Toshiba Semiconductor 功能描述:8 Bit Microcontroller