參數(shù)資料
型號： TMS320C10-25
廠商： Texas Instruments, Inc.
元件分類： 數(shù)字信號處理
英文描述： Digital Signal Processors(160ns指令周期，分離的程序和數(shù)據(jù)總線，外部輪詢中斷的DSP)
中文描述： 數(shù)字信號處理器（160ns指令周期，分離的程序和數(shù)據(jù)總線，外部輪詢中斷的數(shù)字信號處理器）
文件頁數(shù)： 114/139頁
文件大小： 1478K
代理商： TMS320C10-25
TMS320E17, TMS320P17
DIGITAL SIGNAL PROCESSORS
SPRS009C–JANUARY 1987–REVISED JULY 1991
POST OFFICE BOX 1443
HOUSTON, TEXAS 77001
114
EPROM PROGRAMMING
absolute maximum ratings over specified temperature range (unless otherwise noted)
Supply voltage range, V
PP
(see Note 6)
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating only, and
functional operation of the device at these or any other conditions beyond those indicated in the “Recommended Operating Conditions” section of
this specification is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTE 6: All voltage values are with respect to GND.
–0.6 V to 14 V
recommended operating conditions
MIN
NOM
12.5
MAX
12.75
UNIT
V
VPP
Supply voltage (see Note 11)
NOTE 11: VPP can be applied only to programming pins designed to accept VPP as an input. During programming the total supply current
is IPP + ICC.
electrical characteristics over specified temperature range (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
μ
A
mA
IPP1
IPP2
VPP supply current
VPP supply current (during program pulse)
VPP = VCC = 5.5 V
VPP = 12.75 V, VCC = 5.5 V
100
30
50
recommended timing requirements for programming, T
A
= 25
°
C, V
CC
= 6 V, V
PP
= 12.5 V,
(see Note 13)
MIN
NOM
MAX
UNIT
tw(IPGM)
tw(FPGM)
tsu(A)
tsu(E)
tsu(G)
tdis(G)
ten(G)
tsu(D)
tsu(VPP)
tsu(VCC)
th(A)
th(D)
Values derived from characterization data and not tested.
NOTES: 13. For all switching characteristics and timing measurements, input pulse levels are 0.4 V to 2.4 V and VPP = 12.5 V
±
0.25 V during
programming.
15. Common test conditions apply for tdis(G) except during programming.
Initial program pulse duration
0.95
1
1.05
ms
Final pulse duration
3.8
63
ms
Address setup time
2
μ
s
E setup time
2
μ
s
G setup time
2
μ
s
Output disable time from G (see Note 15)
0
130
150
ns
Output enable time from G
ns
Data setup time
2
μ
s
VPP setup time
VCC setup time
Address hold time
2
μ
s
2
μ
s
0
μ
s
Data hold time
2
μ
s
相關PDF資料
PDF描述
TMS320C15-25 Digital Signal Processors(160ns指令周期，分離的程序和數(shù)據(jù)總線，外部輪詢中斷的DSP)
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相關代理商/技術參數(shù)
參數(shù)描述
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