參數(shù)資料
型號(hào)： TMS320C242PGA
元件分類： 數(shù)字信號(hào)處理
英文描述： 16-Bit Digital Signal Processor
中文描述： 16位數(shù)字信號(hào)處理器
文件頁數(shù)： 33/66頁
文件大?。?/td> 803K
代理商： TMS320C242PGA
TMS320C242
DSP CONTROLLER
SPRS063B – DECEMBER 1997 – REVISED DECEMBER 1999
33
POST OFFICE BOX 1443
HOUSTON, TEXAS 77251–1443
PWM characteristics
Characteristics of the PWMs are as follows:
16-bit registers
Programmable deadband for the PWM output pairs, from 0 to 24 s
Minimum deadband width of 50 ns
Change of the PWM carrier frequency for PWM frequency wobbling as needed
Change of the PWM pulse widths within and after each PWM period as needed
External-maskable power and drive-protection interrupts
Pulse-pattern-generator circuit, for programmable generation of asymmetric, symmetric, and four-space
vector PWM waveforms
Minimized CPU overhead using auto-reload of the compare and period registers
capture unit
The capture unit provides a logging function for different events or transitions. The values of the GP timer 2
counter are captured and stored in the two-level FIFO stacks when selected transitions are detected on capture
input pins, CAPx for x = 1, 2, or 3. The capture unit of the TMS320x24x consists of three capture circuits.
Capture units include the following features:
–
One 16-bit capture control register, CAPCON (R/W)
–
One 16-bit capture FIFO status register, CAPFIFO
–
Selection of GP Timer 2 as the time base
–
Three 16-bit 2-level-deep FIFO stacks, one for each capture unit
–
Three Schmitt-triggered capture input pins CAP1, CAP2, and CAP3, one input pin per each capture
unit. [All inputs are synchronized with the device (CPU) clock. In order for a transition to be captured, the
input must hold at its current level to meet two rising edges of the device clock. The input pins CAP1 and
CAP2 can also be used as QEP inputs to the QEP circuit.]
–
User-specified transition (rising edge, falling edge, or both edges) detection
–
Three maskable interrupt flags, one for each capture unit
quadrature-encoder pulse (QEP) circuit
Two capture inputs (CAP1 and CAP2) can be used to interface the on-chip QEP circuit with a quadrature
encoder pulse. Full synchronization of these inputs is performed on-chip. Direction or leading-quadrature pulse
sequence is detected, and GP timer 2 is incremented or decremented by the rising and falling edges of the two
input signals (four times the frequency of either input pulse).
A
相關(guān)PDF資料
PDF描述
TMS320C242PGS 16-Bit Digital Signal Processor
TMS320C30GEL 32-Bit Digital Signal Processor
SM320C25FJM 16-Bit Digital Signal Processor
SM320C25GBM 16-Bit Digital Signal Processor
SM320C40TABC50 32-Bit Digital Signal Processor
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
TMS320C242PGS 制造商:未知廠家 制造商全稱:未知廠家 功能描述:16-Bit Digital Signal Processor
TMS320C25 制造商:TI 制造商全稱:Texas Instruments 功能描述:SECOND-GENERATION DIGITAL SIGNAL PROCESSORS
TMS320C25/-33/-50 制造商:未知廠家 制造商全稱:未知廠家 功能描述:16-Bit Digital Signal Processor
TMS320C25-50 制造商:TI 制造商全稱:Texas Instruments 功能描述:SECOND-GENERATION DIGITAL SIGNAL PROCESSORS
TMS320C25FNA 功能描述:數(shù)字信號(hào)處理器和控制器 - DSP, DSC Digital Signal Proc RoHS:否 制造商:Microchip Technology 核心:dsPIC 數(shù)據(jù)總線寬度:16 bit 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:2 KB 最大時(shí)鐘頻率:40 MHz 可編程輸入/輸出端數(shù)量:35 定時(shí)器數(shù)量:3 設(shè)備每秒兆指令數(shù):50 MIPs 工作電源電壓:3.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-44 安裝風(fēng)格:SMD/SMT
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。

采購(gòu)需求

(若只采購(gòu)一條型號(hào)，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

*型號(hào) *數(shù)量 廠商 批號(hào) 封裝
添加更多采購(gòu)

我的聯(lián)系方式

*
*
*