參數(shù)資料
型號(hào)： TMS320C6727B_07
廠商： Texas Instruments, Inc.
元件分類： 數(shù)字信號(hào)處理
英文描述： Floating-Point Digital Signal Processors
中文描述： 浮點(diǎn)數(shù)字信號(hào)處理器
文件頁數(shù)： 56/116頁
文件大?。?/td> 999K
代理商： TMS320C6727B_07
www.ti.com
4.12 Universal Host-Port Interface (UHPI) [C6727B Only]
4.12.1 UHPI Device-Specific Information
UHPI_HDS[2]
UHPI_HDS[1]
UHPI_HCS
UHPI_HRDY
Internal HSTROBE
Internal HRDY
TMS320C6727B, TMS320C6726B, TMS320C6722B, TMS320C6720
Floating-Point Digital Signal Processors
SPRS370C–SEPTEMBER 2006–REVISED OCTOBER 2007
The C672x DSP includes a flexible universal host-port interface (UHPI) with more options than the
host-port interface on the C671x DSP.
The UHPI on the C672x DSP supports three major operating modes listed in
Table 4-11
.
Table 4-11. UHPI Major Modes on C672x
UHPI MAJ OR MODE
EXAMPLE FIGURE
Figure 4-15
Figure 4-16
Figure 4-17
Multiplexed Host Address/Data Half-Word (16-Bit) Mode
Multiplexed Host Address/Data Fullword (32-Bit) Mode
Non-Multiplexed Host Address/Data Fullword (32-Bit) Mode
In all modes, the UHPI uses three select inputs (UHPI_HCS, UHPI_HDS[2:1]) which are combined
internally to produce the internal strobe signal HSTROBE. The HSTROBE strobe signal is used in the
UHPI to capture incoming address and control signals on its falling edge and write data on its rising edge.
The UHPI_HCS signal also gates the deassertion of the UHPI_HRDY signal externally.
Figure 4-14. UHPI Strobe and Ready Interaction
The two HPI control pins UHPI_HCNTL[1:0] determine the type of access that the host will perform. Note
that only two of the four access types are supported in Non-Multiplexed Host Address/Data Fullword
Mode.
Table 4-12. HPI Access Types Selected by UHPI_HCNTL[1:0]
NON-
MULTIPLEXED
HALF-WORD
MULTIPLEXED
FULLWORD
UHPI_HCNTL[1:0]
DESCRIPTION
MULTIPLEXED
FULLWORD
Y
N
N
Y
00
01
10
11
HPI Control Register (HPIC) Access
HPI Data Access (HPID) with autoincrementing address
HPI Address Register (HPIA) Access
HPI Data Access (HPID) without autoincrementing
address
Y
Y
Y
Y
Y
Y
Y
Y
CAUTION
HPID
When
(UHPI_HCNTL[1:0] = '01'), the set must begin and end at a word-aligned address. In
addition, all four of the UHPI_HBE[3:0] must be enabled on every access in the set.
performing
a
set
of
with
autoincrementing
address
accesses
CAUTION
The encoding of UHPI_CNTL[1:0] on the C672x DSP is different from HCNTL[1:0] on
the C671x DSP. Modes 01 and 10 are swapped.
Peripheral and Electrical Specifications
56
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