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| 型號(hào)： | TMS320DM365ZCE27 |
| 廠商： | Texas Instruments |
| 文件頁(yè)數(shù)： | 177/210頁(yè) |
| 文件大?。?/td> | 0K |
| 描述： | IC DIGITAL MEDIA SOC 338NFBGA |
| 標(biāo)準(zhǔn)包裝： | 160 |
| 系列： | TMS320DM3x, DaVinci™ |
| 類型： | 數(shù)字媒體片內(nèi)系統(tǒng)（DMSoC） |
| 接口： | EBI/EMI，以太網(wǎng)，I²C，McBSP，SPI，UART，USB |
| 時(shí)鐘速率： | 270MHz |
| 非易失內(nèi)存： | ROM（16 kB） |
| 芯片上RAM： | 56kB |
| 電壓 - 輸入/輸出： | 1.8V，3.3V |
| 電壓 - 核心： | 1.20V |
| 工作溫度： | 0°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 338-LFBGA |
| 供應(yīng)商設(shè)備封裝： | 338-NFBGA（13x13） |
| 包裝： | 托盤 |
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SPRS457E
– MARCH 2009 – REVISED JUNE 2011
3.8
Debugging Considerations
3.8.1
Pullup/Pulldown Resistors
Proper board design should ensure that input pins to the DMSoC device always be at a valid logic level
and not floating. This may be achieved via pullup/pulldown resistors. The DMSoC features internal pullup
(IPU) and internal pulldown (IPD) resistors on most pins to eliminate the need, unless otherwise noted, for
external pullup/pulldown resistors.
An external pullup/pulldown resistor needs to be used in the following situations:
Boot and Configuration Pins: If the pin is both routed out and 3-stated (not driven), an external
pullup/pulldown resistor is strongly recommended, even if the IPU/IPD matches the desired
value/state.
Other Input Pins: If the IPU/IPD does not match the desired value/state, use an external
pullup/pulldown resistor to pull the signal to the opposite rail.
For the boot and configuration pins, if they are both routed out and 3-stated (not driven), it is strongly
recommended
that
an
external
pullup/pulldown
resistor
be
implemented.
Although,
internal
pullup/pulldown resistors exist on these pins and they may match the desired configuration value,
providing external connectivity can help ensure that valid logic levels are latched on these device boot and
configuration pins. In addition, applying external pullup/pulldown resistors on the boot and configuration
pins adds convenience to the user in debugging and flexibility in switching operating modes.
Tips for choosing an external pullup/pulldown resistor:
Consider the total amount of current that may pass through the pullup or pulldown resistor. Make sure
to include the leakage currents of all the devices connected to the net, as well as any internal pullup or
pulldown resistors.
Decide a target value for the net. For a pulldown resistor, this should be below the lowest VIL level of
all inputs connected to the net. For a pullup resistor, this should be above the highest VIH level of all
inputs on the net. A reasonable choice would be to target the VOL or VOH levels for the logic family of
the limiting device; which, by definition, have margin to the VIL and VIH levels.
Select a pullup/pulldown resistor with the largest possible value; but, which can still ensure that the net
will reach the target pulled value when maximum current from all devices on the net is flowing through
the resistor. The current to be considered includes leakage current plus, any other internal and
external pullup/pulldown resistors on the net.
For bidirectional nets, there is an additional consideration which sets a lower limit on the resistance
value of the external resistor. Verify that the resistance is small enough that the weakest output buffer
can drive the net to the opposite logic level (including margin).
Remember to include tolerances when selecting the resistor value.
For pullup resistors, also remember to include tolerances on the DVDD rail.
For most systems, a 1-k
resistor can be used to oppose the IPU/IPD while meeting the above criteria.
Users should confirm this resistor value is correct for their specific application.
For most systems, a 20-k
resistor can be used to compliment the IPU/IPD on the boot and configuration
pins while meeting the above criteria. Users should confirm this resistor value is correct for their specific
application.
For more detailed information on input current (II), and the low-/high-level input voltages (VIL and VIH) for
the device, see Section 5.2, Recommended Operating Conditions.
For the internal pullup/pulldown resistors for all device pins, see the peripheral/system-specific terminal
functions table.
Copyright
2009–2011, Texas Instruments Incorporated
Device Configurations
69
Product Folder Link(s): TMS320DM365
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|---|---|
| TMS320DM365ZCE30 | 功能描述:處理器 - 專門應(yīng)用 Dig Media System- on-Chip RoHS:否 制造商:Freescale Semiconductor 類型:Multimedia Applications 核心:ARM Cortex A9 處理器系列:i.MX6 數(shù)據(jù)總線寬度:32 bit 最大時(shí)鐘頻率:1 GHz 指令/數(shù)據(jù)緩存: 數(shù)據(jù) RAM 大小:128 KB 數(shù)據(jù) ROM 大小: 工作電源電壓: 最大工作溫度:+ 95 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:MAPBGA-432 |
| TMS320DM365ZCED30 | 功能描述:處理器 - 專門應(yīng)用 Digital Media SOC RoHS:否 制造商:Freescale Semiconductor 類型:Multimedia Applications 核心:ARM Cortex A9 處理器系列:i.MX6 數(shù)據(jù)總線寬度:32 bit 最大時(shí)鐘頻率:1 GHz 指令/數(shù)據(jù)緩存: 數(shù)據(jù) RAM 大小:128 KB 數(shù)據(jù) ROM 大小: 工作電源電壓: 最大工作溫度:+ 95 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:MAPBGA-432 |
| TMS320DM365ZCEF | 功能描述:處理器 - 專門應(yīng)用 Dig Media System- on-Chip RoHS:否 制造商:Freescale Semiconductor 類型:Multimedia Applications 核心:ARM Cortex A9 處理器系列:i.MX6 數(shù)據(jù)總線寬度:32 bit 最大時(shí)鐘頻率:1 GHz 指令/數(shù)據(jù)緩存: 數(shù)據(jù) RAM 大小:128 KB 數(shù)據(jù) ROM 大小: 工作電源電壓: 最大工作溫度:+ 95 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:MAPBGA-432 |
| TMS320DM367ZCED | 制造商:Texas Instruments 功能描述:TMS320DM367ZCEF |
| TMS320DM367ZCED30 | 制造商:Texas Instruments 功能描述:TMS320DM367ZCEF |
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