![](http://datasheet.mmic.net.cn/390000/TMS320UVC5409_datasheet_16838616/TMS320UVC5409_9.png)
TMS320UVC5409
FIXED-POINT DIGITAL SIGNAL PROCESSOR
SPRS102 – APRIL 1999
9
POST OFFICE BOX 1443
HOUSTON, TEXAS 77251–1443
Terminal Functions (Continued)
NAME
DESCRIPTION
I/O
TERMINAL
TEST PINS (CONTINUED)
EMU0
I/O/Z
Emulator 0 pin. When TRST is driven low, EMU0 must be high for activation of the OFF condition. When TRST is
driven high, EMU0 is used as an interrupt to or from the emulator system and is defined as input/output by way of
the IEEE standard 1149.1 scan system.
EMU1/OFF
I/O/Z
Emulator 1 pin/disable all outputs. When TRST is driven high, EMU1/OFF is used as an interrupt to or from the
emulator system and is defined as input/output by way of the IEEE standard 1149.1 scan system. When TRST is
driven low, EMU1/OFF is configured as OFF. The EMU1/OFF signal, when active low, puts all output drivers into
the high-impedance state. Note that OFF is used exclusively for testing and emulation purposes (not for
multiprocessing applications). Therefore, for the OFF feature, the following apply:
TRST = low
EMU0 = high
EMU1/OFF = low
I = Input, O = Output, Z = High-impedance, S = Supply
memory
The ’UVC5409 device provides both on-chip ROM and RAM memories to aid in system performance and
integration.
on-chip ROM with bootloader
The ’UVC5409 features a 16K-word
×
16-bit on-chip maskable ROM. Customers can arrange to have the ROM
of the ’UVC5409 programmed with contents unique to any particular application.
A bootloader is available in the standard ’UVC5409 on-chip ROM. This bootloader can be used to automatically
transfer user code from an external source to anywhere in the program memory at power up. If the MP/MC pin
is sampled low during a hardware reset, execution begins at location FF80h of the on-chip ROM. This location
contains a branch instruction to the start of the bootloader program. The standard ’UVC5409 bootloader
provides different ways to download the code to accomodate various system requirements:
Parallel from 8-bit or 16-bit-wide EPROM
Parallel from I/O space 8-bit or 16-bit mode
Serial boot from serial ports 8-bit or 16-bit mode
Host-port interface boot
SPI serial EEPROM bootmode
A