參數(shù)資料
型號: TMS320VC5409GGU100
廠商: Texas Instruments
文件頁數(shù): 13/93頁
文件大?。?/td> 0K
描述: IC DIG SIG PROCESSOR 144-BGA
標準包裝: 160
系列: TMS320C54x
類型: 定點
接口: 主機接口,McBSP
時鐘速率: 100MHz
非易失內(nèi)存: ROM(32 kB)
芯片上RAM: 64kB
電壓 - 輸入/輸出: 3.30V
電壓 - 核心: 1.80V
工作溫度: -40°C ~ 100°C
安裝類型: 表面貼裝
封裝/外殼: 144-LFBGA
供應商設備封裝: 144-BGA MICROSTAR(12x12)
包裝: 托盤
配用: 296-15829-ND - DSP STARTER KIT FOR TMS320C5416
其它名稱: 296-10763
296-10763-5
296-10763-5-ND
Introduction
20
April 1999 Revised October 2008
SPRS082F
Table 22. Terminal Functions (Continued)
TERMINAL
NAME
DESCRIPTION
I/O
INTERNAL
TERMINAL
NAME
DESCRIPTION
I/O
PIN STATE
TEST PINS
TCK
Schmitt
trigger/pullup
resistor
I
IEEE standard 1149.1 test clock. TCK is normally a free-running clock signal with a 50% duty cycle.
The changes on the test access port (TAP) of input signals TMS and TDI are clocked into the TAP
controller, instruction register, or selected test data register on the rising edge of TCK. Changes at
the TAP output signal (TDO) occur on the falling edge of TCK.
TDI
Pullup
resistor
I
IEEE standard 1149.1 test data input pin with internal pullup device. TDI is clocked into the selected
register (instruction or data) on a rising edge of TCK.
TDO
O/Z
IEEE standard 1149.1 test data output. The contents of the selected register (instruction or data)
are shifted out of TDO on the falling edge of TCK. TDO is in the high-impedance state except when
the scanning of data is in progress. TDO also goes into the high-impedance state when OFF is low.
TMS
Pullup
resistor
I
IEEE standard 1149.1 test mode select. Pin with internal pullup device. This serial control input is
clocked into the TAP controller on the rising edge of TCK.
TRST
Pulldown
resistor
I
IEEE standard 1149.1 test reset. TRST, when high, gives the IEEE standard 1149.1 scan system
control of the operations of the device. If TRST is driven low, the device operates in its functional
mode, and the IEEE standard 1149.1 signals are ignored. Pin with internal pulldown device.
EMU0
I/O/Z
Emulator 0 pin. When TRST is driven low, EMU0 must be high for activation of the OFF condition.
When TRST is driven high, EMU0 is used as an interrupt to or from the emulator system and is
defined as input/output by way of the IEEE standard 1149.1 scan system.
EMU1/OFF
I/O/Z
Emulator 1 pin/disable all outputs. When TRST is driven high, EMU1/OFF is used as an interrupt
to or from the emulator system and is defined as input/output by way of the IEEE standard 1149.1
scan system. When TRST is driven low, EMU1/OFF is configured as OFF. The EMU1/OFF signal,
when active low, puts all output drivers into the high-impedance state. Note that OFF is used
exclusively for testing and emulation purposes (not for multiprocessing applications). Therefore, for
the OFF feature, the following apply:
TRST = low
EMU0 = high
EMU1/OFF = low
I = Input, O = Output, Z = High-impedance, S = Supply
Although this pin includes an internal pulldown resistor, a 470- external pulldown is required. If the TRST pin is connected to multiple DSPs,
a buffer is recommended to ensure the VIL and VIH specifications are met.
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