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參數(shù)資料
型號(hào): TMS320VC5409ZGU100
廠商: Texas Instruments
文件頁(yè)數(shù): 46/93頁(yè)
文件大?。?/td> 0K
描述: IC FIXED POINT DSP 144-BGA
標(biāo)準(zhǔn)包裝: 160
系列: TMS320C54x
類型: 定點(diǎn)
接口: 主機(jī)接口,McBSP
時(shí)鐘速率: 100MHz
非易失內(nèi)存: ROM(32 kB)
芯片上RAM: 64kB
電壓 - 輸入/輸出: 3.30V
電壓 - 核心: 1.80V
工作溫度: -40°C ~ 100°C
安裝類型: 表面貼裝
封裝/外殼: 144-LFBGA
供應(yīng)商設(shè)備封裝: 144-BGA MICROSTAR(12x12)
包裝: 托盤
配用: 296-15829-ND - DSP STARTER KIT FOR TMS320C5416
Documentation Support
50
April 1999 Revised October 2008
SPRS082F
5
Electrical Specifications
5.1
Absolute Maximum Ratings
Supply voltage I/O range, DVDD
0.3 V to 4.0 V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Supply voltage core range, CVDD
0.3 V to 2.4 V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input voltage range, VI
0.3 V to 4.5 V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Output voltage range, VO
0.3 V to 4.5 V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Operating case temperature range, TC
40
°C to 100°C
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Storage temperature range, Tstg
55
°C to 150°C
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
NOTE: Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating
conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
All voltage values are with respect to VSS.
5.2
Recommended Operating Conditions
MIN
NOM
MAX
UNIT
DVDD
Device supply voltage, I/O
3
3.3
3.6
V
CVDD
Device supply voltage, core
1.71
1.8
1.98
V
VSS
Supply voltage, GND
0
V
VIH
High-level input voltage, I/O
RS, INTn, NMI, BIO, BCLKR0, BCLKR1,
BCLKR2, BCLKX0, BCLKX1, BCLKX2, HAS,
HCS, HDS1, HDS2, TCK, CLKMDn, DVDD =
3.3
"0.3 V
2.2
DVDD + 0.3
V
VIH
High-level input voltage, I/O
TRST
2.5
DVDD + 0.3
V
X2/CLKIN
1.4
CVDD + 0.3
All other inputs
2.0
DVDD + 0.3
VIL
Low-level input voltage
RS, INTn, NMI, X2/CLKIN, BIO, BCLKR0,
BCLKR1, BCLKR2, BCLKX0, BCLKX1,
BCLKX2, HAS, HCS, HDS1, HDS2, TCK,
CLKMDn, DVDD = 3.3"0.3 V
0.3
0.6
V
All other inputs
0.3
0.8
IOH
High-level output current
300
A
IOL
Low-level output current
1.5
mA
TC
Operating case temperature
40
100
°C
Texas Instrument DSPs do not require specific power sequencing between the core supply and the I/O supply. However, systems should be
designed to ensure that neither supply is powered up for extended periods of time if the other supply is below the proper operating voltage.
Excessive exposure to these conditions can adversely affect the long-term reliability of the devices. System-level concerns such as bus
contention may require supply sequencing to be implemented. In this case, the core supply should be powered up at the same time as or prior
to the I/O buffers, and then powered down after the I/O buffers.
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