參數(shù)資料
型號: TMX320F2810PGFA
廠商: Texas Instruments, Inc.
元件分類: 數(shù)字信號處理
英文描述: DIGITAL SIGNAL PROCESSORS
中文描述: 數(shù)字信號處理器
文件頁數(shù): 42/103頁
文件大?。?/td> 1341K
代理商: TMX320F2810PGFA
TMS320F2810, TMS320F2812
DIGITAL SIGNAL PROCESSORS
SPRS174B
APRIL 2001
REVISED SEPTEMBER 2001
42
POST OFFICE BOX 1443
HOUSTON, TEXAS 77251
1443
external interrupts
Table 27. External Interrupts Registers
NAME
ADDRESS RANGE
SIZE (x16)
DESCRIPTION
XINT1CR
0x0000 7070
1
XINT1 configuration register
XINT2CR
0x0000 7071
1
XINT2 configuration register
reserved
0x0000 7072
0x0000 7076
5
XNMICR
0x0000 7077
1
XNMI configuration register
XINT1CTR
0x0000 7078
1
XINT1 counter register
XINT2CTR
0x0000 7079
1
XINT2 counter register
reserved
0x0000 707A
0x0000 707E
5
XNMICTR
0x0000 707F
1
XNMI counter register
Each external interrupt can be enabled/disabled or qualified using positive or negative going edge. The register
bits to control this are described in Table 28.
Table 28. XINT1/2CR Register Bit Definitions
BITS
NAME
TYPE
RESET
DESCRIPTION
0
ENABLE
R/W
0
0
1
Interrupt Disabled
Interrupt Enabled
1
reserved
R = 0
0
2
POLARITY
R/W
0
0
1
Interrupt is selected as negative edge triggered
Interrupt is selected as positive edge triggered
15:3
reserved
R = 0
0:0
Table 29 shows the bit definitions of the XNMICR register.
Table 29. XNMICR Register Bit Definitions
BITS
NAME
TYPE
RESET
DESCRIPTION
0
ENABLE
R/W
0
0
1
NMI Interrupt Disabled
NMI Interrupt Enabled
1
SELECT
R/W
0
0
1
Timer 1 Connected To INT13
XNMI Connected To INT13
2
POLARITY
R/W
0
0
1
Interrupt is selected as negative edge triggered
Interrupt is selected as positive edge triggered
15:3
reserved
R = 0
0:0
P
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