參數(shù)資料
型號(hào)： TPS2343DDPR
廠商： TEXAS INSTRUMENTS INC
元件分類： 電源管理
英文描述： 6-CHANNEL POWER SUPPLY SUPPORT CKT, PDSO80
封裝： GREEN, PLASTIC, HTSSOP-80
文件頁(yè)數(shù)： 21/42頁(yè)
文件大?。?/td> 942K
代理商： TPS2343DDPR
TPS2343
SLUS644B FEBRUARY 2005 MAY 2005
28
www.ti.com
APPLICATION INFORMATION
PCIX Capability Selection
The PCIX Local Bus 2.0 specification describes how the PCIXCAP pins program board operating mode using
resistors on the board. The TPS2343 decodes the resistor values and communicates this to the slot controller
using logic signals.
Five different operating modes are allowed under PCIX 2.0. These modes are compatible with the three
existing PCI and PCIX 1.0 modes and add operation at 266 MHz and 533 MHz. The PCIX 2.0 specification
requires that PCIXCAP pins are pulled up to 3.3 V with a 3.3-k
, 5% resistor on the backplane or systemboard.
This pull-up resistor combined with the resistor on the board creates a voltage divider as shown in Table 4.
Table 4.
MODE
BUS SPEED
BOARD CONNECTION ON PCIXCAP PIN
PCIXCAP PIN NOMINAL VOLTAGE
PCI 2.2
33 MHz/66 MHz
ground
0 V
PCIX 1.0
66 MHz
10 k
1% to ground
2.481 V
PCIX 1.0
133 MHz
open circuit
3.300 V
PCIX 2.0
266 MHz
3.16 k
1% to ground
1.614 V
PCIX 2.0
533 MHz
1.02 k
1% to ground
0.779 V
The TPS2343 detects these five different modes using four comparators. These comparators have voltage
thresholds between the nominal voltage points, as shown in the electrical characteristics table. These
thresholds are proportional to DIGVCC voltage, so any supply variations are compensated by equivalent
variation in the voltage thresholds. The voltage thresholds are far from the nominal voltage, so there is noise
margin in mode selection. The table below shows these margins with a 3.3-k
, 5% pull-up resistor and the
voltage threshold ranges shown in the electrical characteristic table.
Table 5.
MODE WINDOW
PCIXCAP VOLTAGE NOISE MARGIN
33 MHz to 533 MHz
0.279 V
533 MHz to 266 MHz
0.314 V
266 MHz to 66 MHz
0.331 V
66 MHz to 133 MHz
0.319 V
PCIXCAP Outputs
The PCIXCAPxn outputs directly communicate the PCIXCAP resistances according to Table 6.
Table 6.
MODE
BUS SPEED
PCIXCAPx1
(PINS 48, 13)
PCIXCAPx2
(PINS 46, 15)
PCIXCAPx3
(PINS 43, 18)
PCI 2.2
33 MHz/66 MHz
0
PCIX 1.0
66 MHz
1
0
PCIX 1.0
133 MHz
1
0
PCIX 2.0
266 MHz
0
1
PCIX 2.0
533 MHz
1
0
1
If desired, PCIXCAPx3 can be connected to VIOSEL through an inverter to automatically set VIO based on
adapter card type.
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