參數(shù)資料
型號： TVP5031CPFP
廠商： Texas Instruments, Inc.
英文描述： Color Decoder Circuit
中文描述： 彩色解碼器電路
文件頁數(shù)： 49/85頁
文件大小： 378K
代理商： TVP5031CPFP
2–33
2.10 Internal Control Registers
The TVP5031 is initialized and controlled by a set of internal registers which set all the device operating parameters.
Communication between and the external controller and TVP5031 is through a standard the host port interface port.
Table 2–12 shows the summary of these registers. The reserved bits must be written with 0. The detailed
programming information of each register is described in the following sections.
Table 2–12. Registers Summary
REGISTER FUNCTION
PHI
I2C
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Video input source selection 1
00
←
00
00
←
01
00
←
02
00
←
03
00
←
04-05
00
←
06
00
←
07
00
←
08
00
←
09
00
←
0A
00
←
0B
00
←
0C
00
←
0D
00
←
0E
00
←
0F-15
00
←
16
00
←
17
00
←
18
00
←
19
00
←
1A
00
←
1B
00
←
1C
00
←
1D
00
←
1E
00
←
F1–7D
00
←
7E
00
←
7F
00
←
80
00
←
81
00
←
82
00
←
83
00
←
84
00
←
85
00
←
86
00h
Analog channel controls
01h
Operation mode controls
02h
Miscellaneous controls
03h
Reserved
04-05h
Color killer threshold control
06h
Luminance processing control 1
07h
Luminance processing control 2
08h
Brightness control
09h
Color saturation control
0Ah
Color hue control
0Bh
Contrast control
0Ch
Outputs and data rate select
0Dh
Luminance processing control 3
0Eh
Reserved
0F-15h
Horizontal sync start NTSC
16h
Horizontal sync start PAL
17h
Vertical blanking start
18h
Vertical blanking stop
19h
Chroma processing control 1
1Ah
Chroma processing control 2
1Bh
Interrupt reset B
1Ch
Interrupt enable B
1Dh
Interrupt configuration B
1Eh
Reserved
1F-7Dh
Program RAM write
7E
W
Microprocessor reset clear
7Fh
W
Major software revision
80h
R
Status 1
81h
R
Status 2
82h
R
Status 3
83h
R
Status 4
84h
R
Interrupt status B
85h
R
Interrupt B active
86h
R
NOTE: R = Read only for all interfaces
W = Write only for all interfaces
R/W = Read and write for all host interfaces
R/W = Read and write for I2C host interface. Write only for PHI host interfaces.
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