參數(shù)資料
型號(hào)： UPD720130
廠商： NEC Corp.
英文描述： USB2.0 to IDE Bridge
中文描述： USB2.0轉(zhuǎn)IDE橋
文件頁數(shù)： 13/44頁
文件大?。?/td> 316K
代理商： UPD720130
Data Sheet S16302EJ3V0DS
13
μ
PD720130
2.5
Power Control
To realize bus-powered or high performance self-powered USB2.0 to IDE Bridge system, the
μ
PD720130 has
two internal system clock mode. One is 7.5 MHz for bus-powered mode and the other is 60 MHz for self-powered
mode. The
μ
PD720130 controls the power state by events as follows. The word with under line shows event.
The Italic word shows the power state.
Figure 2-3. Power State Control
(a) Bus-powered Mode
Idle Mode
Vbus OFF
Vbus ON
Connect
Set Configuration
Resume
Resume
Suspend
Hardware Reset
Bus Reset
Power OFF
Set Configuration
Resume
Resume
Suspend
Suspend
Suspend
FS CONNECT
HS CONNECT
Power = P
ENUM_FS
Power = P
ENUM_HS
Suspend
Suspend
Resume
Resume
Power = P
FS_B
Power = P
HS_B
Power = P
SPND
Power = P
SPND
Power = P
RESET
HS Enumeration
State
Suspend
Mode
HS State
FS Operation
State
Configured
State
FS Enumeration
State
Suspend
Mode
Configured
State
Power OFF
Default State
(b) Self-powered Mode
Power = P
SPND
Power ON
Vbus OFF
Vbus ON
Connect
Default
State
Set Configuration
Resume
Resume
Suspend
Hardware Reset
Power = P
RESET
CMB_STATE = 1
Bus Reset
Power OFF
Set Configuration
Resume
Resume
Suspend
Suspend
Suspend
FS CONNECT
HS CONNECT
Power = P
ENUM_FS
Power = P
ENUM_HS
Power = P
COMBO
Suspend
Suspend
Resume
Resume
Power = P
FS_S
Power = P
HS_S
Power = P
SPND
CMB_STATE = 0
Power OFF
IDE Bus
Release
State
Idle Mode
Suspend
Mode
HS Operation
State
Disconnect
Mode
FS State
Configured
State
FS Enumeration
State
Suspend
Mode
HS Enumeration
State
Configured
State
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