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參數(shù)資料
| 型號： | UPD7225GB-3B7 |
| 廠商： | NEC Corp. |
| 英文描述： | PROGRAMMABLE LCD CONTROLLER/DRIVER |
| 中文描述： | 可編程LCD控制器/驅(qū)動 |
| 文件頁數(shù)： | 14/52頁 |
| 文件大?。?/td> | 289K |
| 代理商： | UPD7225GB-3B7 |
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Data Sheet S14308EJ6V0DS00
14
μ
PD7225
2.5 Data Memory/Data Pointer
The data memory is a memory which stores display data (32
×
4 bits). Data input by serial transfer, command
immediate data, etc., is written to the data memory.
Specified by data pointer
Address
0
1
2
3
4
5
6
7
8
9
10
29 30 31
0
1
2
3
In the data memory, either data from the serial register (when the segment decoder is not used) or data from the
segment decoder (when the segment decoder is used) is written as display data.
When the segment decoder is not used, all bits or the lower 4 bits of the serial data (C, /D = 0) input to the serial
register are assigned and written to the specific bits in location 2 to location 4 in the data memory according to the
specified time division. When the segment decoder is used, the contents of the serial register (C, /D = 0) are
decoded by the segment decoder, and the corresponding display data are allocated to the location specified in data
memory by the time division specification (devide-by-3, -4 time division) and the MSB (Most Significant Bit) of the
serial data. (1) to (4) below describe these operations.
The contents of the data memory can be modified in 4-bit units or in bit units using a command.
(1) Static
The lower 4 bits of the contents of the serial register are written to bit 0 in each address (the upper 4 bits are
ignored).
bit3
bit0
D3
D2
D1
D0
n + 3
n + 2
n + 1
Address n
Only the content of bit 0 in each address are effective as display data.
After the data is written, the data pointer points to address n + 4.
(2) Divide-by-2 time division
The contents of the 4 even bits of the serial register are written to bit 0 in the four addresses, and the contents
of 4 odd bits of the serial register are written to bit 1.
bit3
bit0
D7 D6
D5 D4
D3 D2
D1 D0
n + 3
n + 2
n + 1
Address n
The contents of bits 0 and 1 of each address are effective as display data.
After the data is written, the data pointer points to address n + 4.
Bit
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