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參數(shù)資料
| 型號： | UPD7225GC-AB6 |
| 廠商： | NEC Corp. |
| 英文描述： | PROGRAMMABLE LCD CONTROLLER/DRIVER |
| 中文描述： | 可編程LCD控制器/驅(qū)動 |
| 文件頁數(shù)： | 26/52頁 |
| 文件大小： | 289K |
| 代理商： | UPD7225GC-AB6 |
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Data Sheet S14308EJ6V0DS00
26
μ
PD7225
8.3 UNSYNCHRONIZED TRANSFER
0
0
1
1
0
0
0
0
This command controls display data modification.
After this command is executed, display data is modified at the rising edge of the /CS pin.
8.4 PAUSE TRANSFER
0
0
1
1
1
0
0
0
This command disables display data modification.
After this command is executed, display data can not be modified at the first rising edge of the /CS pin; instead,
modification is put off until the second rising edge of the /CS pin. In addition, the data pointer is not cleared at the
first rising edge of the /CS pin (refer to
2.5 Data Memory/Data Pointer
).
This command is used when it becomes necessary to set the /CS pin to high due to an interrupt for the CPU in the
middle of serial data input operation.
8.5 BLINKING ON
0
0
0
1
1
0
1
K0
This command sets the blinking operation status. The blinking frequency is set by the least significant bit of the
command (bit K0).
K0
Blinking frequency (Hz)
0
f
CL
/2
17
1
f
CL
/2
16
Remark
f
CL
: Clock oscillation frequency
8.6 BLINKING OFF
0
0
0
1
1
0
0
0
This command stops blinking operation.
8.7 DISPLAY ON
0
0
0
1
0
0
0
1
After this command is executed, LCD display operation starts according to the display data contained in the
display data latch.
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