參數(shù)資料
型號(hào): UPD75066GBA
廠商: NEC Corp.
英文描述: 4-BIT SINGLE-CHIP MICROCOMPUTER
中文描述: 4位單片機(jī)
文件頁(yè)數(shù): 37/68頁(yè)
文件大?。?/td> 640K
代理商: UPD75066GBA
37
μ
PD75064, 75066, 75068, 75064(A), 75066(A), 75068(A)
Mne-
monic
AND1
OR1
XOR1
BR
BRCB
CALL
Operand
CY, fmem.bit
CY, pmem.@L
CY, @H+mem.bit
CY, fmem.bit
CY, pmem.@L
CY, @H+mem.bit
CY, fmem.bit
CY, pmem.@L
CY, @H+mem.bit
addr
!addr
Note
$addr
!caddr
!addr
Bytes
2
2
2
2
2
2
2
2
2
3
1
2
3
Ma-
chine
cycle
2
2
2
2
2
2
2
2
2
3
2
2
3
Skip
condition
Address-
ing area
*4
*5
*1
*4
*5
*1
*4
*5
*1
*6
*6
*7
*8
*6
Operation
CY
CY
(fmem.bit)
CY
CY
(pmem
7-2
+ L
3-2
.bit(L
1-0
))
CY
CY
(H + mem
3-0
.bit)
CY
CY
(fmem.bit)
CY
CY
(pmem
7-2
+ L
3-2
.bit(L
1-0
))
CY
CY
(H + mem
3-0
.bit)
CY
CY
(fmem.bit)
CY
CY
(pmem
7-2
+ L
3-2
.bit(L
1-0
))
CY
CY
(H + mem
3-0
.bit)
μ
PD75064
PC
11-0
addr
(Appropriate instructions are
selected from BRCB !caddr, and
BR $addr by the assembler.)
μ
PD75066, 75068
PC
12-0
addr
(Appropriate instructions are
selected from BR !addr, BRCB
!caddr, and BR $addr by the
assembler.)
μ
PD75066, 75068
PC
12-0
addr
μ
PD75064
PC
11-0
addr
μ
PD75066, 75068
PC
12-0
addr
μ
PD75064
PC
11-0
caddr
11-0
μ
PD75066, 75068
PC
12-0
PC
12
+ caddr
11-0
μ
PD75064
(SP – 4)(SP – 1)(SP – 2)
PC
11-0
(SP – 3)
MBE, 0, 0, 0
PC
11-0
addr, SP
SP – 4
μ
PD75066, 75068
(SP – 4)(SP – 1)(SP – 2)
PC
11-0
(SP–3)
MBE, 0, 0, PC
12
PC
12-0
addr, SP
SP – 4
Note
BR !addr instruction is not provided in the
μ
PD75064.
Group
Memory
bit mani-
pulation
Branch
Sub-
routine
stack
control
相關(guān)PDF資料
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