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參數(shù)資料
| 型號(hào)： | UPD75518GFA |
| 廠商： | NEC Corp. |
| 英文描述： | 4 BIT SINGLE-CHIP MICROCOMPUTER |
| 中文描述： | 4位單片機(jī) |
| 文件頁(yè)數(shù)： | 84/180頁(yè) |
| 文件大小： | 1595K |
| 代理商： | UPD75518GFA |
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84
μ
PD75518(A)
4.8.1 Serial Interface (Channel 0) Functions
The clock synchronous 8-bit serial interface is contained in the
μ
PD75518(A) and has four modes.
The functions of the four modes are outlined below.
Operation halt mode
This mode is used when serial transfer is not performed. This mode reduces power consumption.
Three-wire serial I/O mode
In this mode, 8-bit data is transferred through three lines: Serial clock (SCK0), serial output (SO0), and serial
input (SI0).
The three-wire serial I/O mode allows full-duplex transmission, so data transfer can be performed at higher
speed.
The user can choose 8-bit data transfer starting with the MSB or LSB, so devices starting with either the
MSB or LSB can be connected.
The three-wire serial I/O mode enables connections to be made with the 75X series, 78K series, and many
other types of peripheral I/O devices.
Two-wire serial I/O mode
In this mode, 8-bit data is transferred through two lines: Serial clock (SCK0) and serial data bus (SB0 or
SB1). By controlling output levels on the two lines by software, communication with multiple devices is
enabled.
The output levels of SCK0 and SB0 (or SB1) can be controlled by software, so the user can match an arbitrary
transfer format. This means that a line that has been required for handshaking to connect multiple lines
can be eliminated for more efficient I/O port utilization.
Serial bus interface (SBI) mode
In this mode, communication with multiple devices can be performed using two lines: Serial clock (SCK0)
and serial data bus (SB0 or SB1).
This mode conforms to the NEC serial bus format.
In this mode, the transmitter can output, on the serial data bus, an address for selecting a device subject
to serial communication, commands directed to the remote device, and data. The receiver can identify an
address, commands, and data from received data by hardware. This function enables more efficient I/O
port utilization as in the case of the two-wire serial I/O mode. In addition, this function can simplify the
serial interface control portion of an application program.
4.8.2 Configuration of Serial Interface (Channel 0)
Fig. 4-34 shows the block diagram of the serial interface (channel 0).
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相關(guān)代理商/技術(shù)參數(shù) |
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| UPD7554AG-597-E2 | 制造商:Renesas Electronics Corporation 功能描述: |
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| UPD7554AG-603-E2 | 制造商:Renesas Electronics Corporation 功能描述: |
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