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CHAPTER 17 INTERRUPT FUNCTIONS
User’s Manual U13655EJ2V1UD
242
Table 17-1. Interrupt Source List
Interrupt Source
Interrupt
Type
Default
Priority
Note 1
Name
Trigger
Internal/
External
Vector Table
Address
Basic Con-
figuration
Note 2
Non-
maskable
–
INTWDT
Watchdog timer overflow (when non-maskable
interrupt is selected)
(A)
0
(highest)
INTWDT
Watchdog timer overflow (when maskable
interrupt is selected)
Internal
0004H
(B)
1
INTP0
INTP0 pin input edge detection
External
0006H
(C)
2
INTMRO0 MRTD edge detection
Internal
0008H
(B)
3
INTP1
INTP1 pin input edge detection
000AH
4
INTP2
INTP2 pin input edge detection
000CH
5
INTP3
INTP3 pin input edge detection
000EH
6
INTP4
INTP4 pin input edge detection
0010H
7
INTP5
INTP5 pin input edge detection
0012H
8
INTP6
INTP6 pin input edge detection
When CR00 is specified for compare register:
TM0 & CR00 match signal generation
When CR00 is specified for capture register:
TI01 pin valid edge detection
When CR01 is specified for compare register:
TM0 & CR01 match signal generation
When CR01 is specified for capture register:
TI00 pin valid edge detection
External
0014H
(C)
9
INTTM00
0016H
10
INTTM01
0018H
11
INTSER2
Serial interface UART2 reception error occurrence
001AH
12
INTSR2
Serial interface UART2 reception completion
001CH
13
INTST2
Serial interface UART2 transmission completion
001EH
14
INTCSI3
Serial interface SIO3 transfer completion
0020H
15
INTMRT0
TMMR0 & CRM0 match signal generation
0022H
16
INTTM80
TM80 & CR80 match signal generation
0024H
17
INTTM81
TM81 & CR81 match signal generation
0026H
18
INTTM82
TM82 & CR82 match signal generation
0028H
19
INTTM83
TM83 & CR83 match signal generation
002AH
20
INTTM2
TM2 & CR2 match signal generation
002CH
21
INTSA0
Sampling timer (TMSA0) & compare register
(CRSA0) match signal generation
002EH
22
INTSB0
Sampling timer (TMSB0) & compare register
(CRSB0) match signal generation
0030H
23
INTRTO1
Real-time output specified number of reloads
achieve register
Internal
0032H
(B)
24
INTSMP0
Sampling interrupt input 0
0034H
25
INTSMP1
Sampling interrupt input 1
0036H
26
INTSMP2
Sampling interrupt input 2
0038H
27
INTSMP3
Sampling interrupt input 3
003AH
Maskable
28
INTSMP4
Sampling interrupt input 4
External
003CH
(C)
Software
Notes 1.
–
BRK
Execution of BRK instruction
–
003EH
(D)
The default priority is the highest priority when more than one maskable interrupt is generated. 0 is
the highest priority and 28 is the lowest.
Basic configuration types (A) to (D) correspond to (A) to (D) in Table 17-1.
2.
Remark
There are two types of watchdog timer interrupt sources (INTWDT), a non-maskable interrupt and a
maskable interrupt (internal). Select one of these types.