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參數(shù)資料
| 型號(hào)： | UPD78F9221MC-5A4-A |
| 廠商： | Renesas Electronics America |
| 文件頁(yè)數(shù)： | 57/125頁(yè) |
| 文件大?。?/td> | 0K |
| 描述： | MCU 8BIT 2KB FLASH 20PIN |
| 標(biāo)準(zhǔn)包裝： | 400 |
| 系列： | 78K0S/Kx1+ |
| 核心處理器： | 78K0S |
| 芯體尺寸： | 8-位 |
| 速度： | 10MHz |
| 連通性： | LIN，UART/USART |
| 外圍設(shè)備： | LVD，POR，PWM，WDT |
| 輸入/輸出數(shù)： | 15 |
| 程序存儲(chǔ)器容量： | 2KB（2K x 8） |
| 程序存儲(chǔ)器類型： | 閃存 |
| RAM 容量： | 128 x 8 |
| 電壓 - 電源 (Vcc/Vdd)： | 2 V ~ 5.5 V |
| 數(shù)據(jù)轉(zhuǎn)換器： | A/D 4x10b |
| 振蕩器型： | 內(nèi)部 |
| 工作溫度： | -40°C ~ 85°C |
| 封裝/外殼： | 20-LSSOP（0.240"，6.10mm 寬） |
| 包裝： | 托盤 |
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CHAPTER 3 CPU ARCHITECTURE
User’s Manual U16898EJ6V0UD
35
(d) Carry flag (CY)
This flag stores overflow and underflow that have occurred upon add/subtract instruction execution. It
stores the shift-out value upon rotate instruction execution and functions as a bit accumulator during bit
operation instruction execution.
(3) Stack pointer (SP)
This is a 16-bit register to hold the start address of the memory stack area. Only the internal high-speed RAM
area can be set as the stack area (Other than the internal high-speed RAM area cannot be set as the stack
area).
Figure 3-9. Stack Pointer Configuration
0
15
SP14
SP15
SP
SP13 SP12 SP11 SP10
SP9
SP8
SP7
SP6
SP5
SP4
SP3
SP2
SP1
SP0
The SP is decremented before writing (saving) to the stack memory and is incremented after reading
(restoring) from the stack memory.
Each stack operation saves/restores data as shown in Figures 3-10 and 3-11.
Cautions 1. Since reset signal generation makes the SP contents undefined, be sure to initialize the
SP before using the stack memory.
2. Stack pointers can be set only to the high-speed RAM area, and only the lower 10 bits
can be actually set.
Thus, if the stack pointer is specified to 0FF00H, it is converted to 0FB00H in the high-
speed RAM area, since 0FF00H is in the SFR area and not in the high-speed RAM area.
When the value is actually pushed onto the stack, 1 is subtracted from 0FB00H to
become 0FAFFH, but since that value is not in the high-speed RAM area, it is converted
to 0FEFFH, which is the same value as when 0FF00H is set to the stack pointer.
Figure 3-10. Data to Be Saved to Stack Memory
Interrupt
PSW
PC15 to PC8
PC7 to PC0
Lower half
register pairs
SP
SP _ 2
CALL, CALLT
instructions
PUSH rp
instruction
SP _ 1
SP
SP _ 2
SP _ 1
SP
PC7 to PC0
SP _ 3
SP _ 2
SP _ 1
SP
SP _ 3
Upper half
register pairs
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| UPD78F9222CS-CAC-A | 功能描述:MCU 8BIT 4KB FLASH 20PIN RoHS:是 類別:集成電路 (IC) >> 嵌入式 - 微控制器， 系列:78K0S/Kx1+ 標(biāo)準(zhǔn)包裝:300 系列:78K0R/Ix3 核心處理器:78K/0R 芯體尺寸:16-位 速度:40MHz 連通性:3 線 SIO，I²C，LIN，UART/USART 外圍設(shè)備:DMA，LVD，POR，PWM，WDT 輸入/輸出數(shù):27 程序存儲(chǔ)器容量:16KB（16K x 8） 程序存儲(chǔ)器類型:閃存 EEPROM 大小:- RAM 容量:1K x 8 電壓 - 電源 (Vcc/Vdd):2.7 V ~ 5.5 V 數(shù)據(jù)轉(zhuǎn)換器:A/D 8x10b 振蕩器型:內(nèi)部 工作溫度:-40°C ~ 85°C 封裝/外殼:38-SSOP 包裝:托盤 |
| UPD78F9222MC | 制造商:Renesas Electronics Corporation 功能描述:UPD78F9222MC |
| UPD78F9222MC(A)-5A4-A | 制造商:Renesas Electronics Corporation 功能描述: |
| UPD78F9222MC(T)-5A4 | 制造商:Renesas Electronics Corporation 功能描述: |
| UPD78F9222MC(T)-5A4-A | 制造商:NEC Electronics Corporation 功能描述:8BIT MCU 4K FLASH 256B RAM 78F9222 制造商:NEC Electronics Corporation 功能描述:8BIT MCU, 4K FLASH, 256B RAM, 78F9222 制造商:NEC Electronics Corporation 功能描述:8BIT MCU, 4K FLASH, 256B RAM, 78F9222; Controller Family/Series:UPD78; Core Size:8bit; No. of I/O's:17; Supply Voltage Min:2V; Supply Voltage Max:5.5V; Digital IC Case Style:SSOP; No. of Pins:20; Program Memory Size:4KB; RAM Memory ;RoHS Compliant: Yes |
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