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參數(shù)資料
| 型號： | UPD78F9221MC-5A4-A |
| 廠商： | Renesas Electronics America |
| 文件頁數(shù)： | 96/125頁 |
| 文件大小： | 0K |
| 描述： | MCU 8BIT 2KB FLASH 20PIN |
| 標(biāo)準(zhǔn)包裝： | 400 |
| 系列： | 78K0S/Kx1+ |
| 核心處理器： | 78K0S |
| 芯體尺寸： | 8-位 |
| 速度： | 10MHz |
| 連通性： | LIN，UART/USART |
| 外圍設(shè)備： | LVD，POR，PWM，WDT |
| 輸入/輸出數(shù)： | 15 |
| 程序存儲(chǔ)器容量： | 2KB（2K x 8） |
| 程序存儲(chǔ)器類型： | 閃存 |
| RAM 容量： | 128 x 8 |
| 電壓 - 電源 (Vcc/Vdd)： | 2 V ~ 5.5 V |
| 數(shù)據(jù)轉(zhuǎn)換器： | A/D 4x10b |
| 振蕩器型： | 內(nèi)部 |
| 工作溫度： | -40°C ~ 85°C |
| 封裝/外殼： | 20-LSSOP（0.240"，6.10mm 寬） |
| 包裝： | 托盤 |
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CHAPTER 4 PORT FUNCTIONS
User’s Manual U16898EJ6V0UD
70
4.4
Operation of Port Function
The operation of a port differs, as follows, depending on the setting of the I/O mode.
Caution
Although a 1-bit memory manipulation instruction manipulates 1 bit, it accesses a port in 8-bit
units. Therefore, the contents of the output latch of a pin in the input mode, even if it is not
subject to manipulation by the instruction, are undefined in a port with a mixture of inputs and
outputs.
4.4.1
Writing to I/O port
(1) In output mode
The data can be written to the output latch by a transfer instruction. In addition, the data of the output latch are
output from the pin. Once data is written to the output latch, it is retained until new data is written to the output
latch.
When a reset signal is generated, cleans the data in the output latch.
(2) In input mode
The data can be written to the output latch by a transfer instruction. Because the output buffer is off, however,
the pin status remains unchanged.
Once data is written to the output latch, it is retained until new data is written to the output latch.
When a reset signal is generated, cleans the data in the output latch.
4.4.2
Reading from I/O port
(1) In output mode
The data of the output latch can be read by a transfer instruction. The data of the output latch remain unchanged.
(2) In input mode
The pin status can be read by a transfer instruction. The contents of the output latch remain unchanged.
4.4.3
Operations on I/O port
(1) In output mode
An operation is performed on the data of the output latch. The result is written to the output latch. The data of the
output latch are output from the pin.
Once data is written to the output latch, it is retained until new data is written to the output latch.
When a reset signal is generated, cleans the data in the output latch.
(2) In input mode
The pin level is read and an operation is performed on its data. The operation result is written to the output latch.
However, the pin status remains unchanged because the output buffer is off.
When a reset signal is generated, cleans the data in the output latch.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| UPD78F9222CS-CAC-A | 功能描述:MCU 8BIT 4KB FLASH 20PIN RoHS:是 類別:集成電路 (IC) >> 嵌入式 - 微控制器， 系列:78K0S/Kx1+ 標(biāo)準(zhǔn)包裝:300 系列:78K0R/Ix3 核心處理器:78K/0R 芯體尺寸:16-位 速度:40MHz 連通性:3 線 SIO，I²C，LIN，UART/USART 外圍設(shè)備:DMA，LVD，POR，PWM，WDT 輸入/輸出數(shù):27 程序存儲(chǔ)器容量:16KB（16K x 8） 程序存儲(chǔ)器類型:閃存 EEPROM 大小:- RAM 容量:1K x 8 電壓 - 電源 (Vcc/Vdd):2.7 V ~ 5.5 V 數(shù)據(jù)轉(zhuǎn)換器:A/D 8x10b 振蕩器型:內(nèi)部 工作溫度:-40°C ~ 85°C 封裝/外殼:38-SSOP 包裝:托盤 |
| UPD78F9222MC | 制造商:Renesas Electronics Corporation 功能描述:UPD78F9222MC |
| UPD78F9222MC(A)-5A4-A | 制造商:Renesas Electronics Corporation 功能描述: |
| UPD78F9222MC(T)-5A4 | 制造商:Renesas Electronics Corporation 功能描述: |
| UPD78F9222MC(T)-5A4-A | 制造商:NEC Electronics Corporation 功能描述:8BIT MCU 4K FLASH 256B RAM 78F9222 制造商:NEC Electronics Corporation 功能描述:8BIT MCU, 4K FLASH, 256B RAM, 78F9222 制造商:NEC Electronics Corporation 功能描述:8BIT MCU, 4K FLASH, 256B RAM, 78F9222; Controller Family/Series:UPD78; Core Size:8bit; No. of I/O's:17; Supply Voltage Min:2V; Supply Voltage Max:5.5V; Digital IC Case Style:SSOP; No. of Pins:20; Program Memory Size:4KB; RAM Memory ;RoHS Compliant: Yes |
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